200+ applicants

Company

Original Job Post

Intelliswift Software · 1 week ago

Design Verification Engineer

San Jose, CA

Contract

Remote

Mid Level

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Hiring Manager

Basant Sharma

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Responsibilities

Design and develop verification test benches using UVM methodology.

Write test cases, run simulations, and debug failures to improve the design quality.

Collaborate with design and architecture teams to ensure the functionality and performance of the design.

Utilize System Verilog, SystemC, and C/C++ for verification activities.

Qualification

Find out how your skills align with this job's requirements. If anything seems off, you can easily click on the tags to select or unselect skills to reflect your actual expertise.

UVMSystem VerilogTest Bench DevelopmentC/C++SystemC

Required

Design Verification Engineer

UVM

System Verilog

Test Bench Development

strong C/C++

Preferred

SystemC

Company

Intelliswift Software

Glassdoor

3.9

Intelliswift Software provides information technology services and solutions.

Founded in 2001

Newark, California, USA

1,001-5,000 employees

https://www.intelliswift.com/

H1B Sponsorship

Intelliswift Software has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Trends of Total Sponsorships

2023 (37)

2022 (29)

2021 (31)

2020 (35)