HCLTech · 4 days ago
Design Verification Engineer
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Responsibilities
Design and implement verification environments using SystemVerilog and UVM.
Develop verification components like drivers, monitors, checkers, and scoreboards.
Write and execute test plans to verify the functionality of complex hardware systems.
Collaborate with cross-functional teams to ensure successful verification and validation of designs.
Qualification
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Required
BS or MS in computer science, computer engineering, or electrical engineering.
6+ years of work experience in designing, verifying, and validating complex hardware systems.
Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly.
Experience with writing directed and random test cases.
Experience with design verification and validation methodologies and strategies.
Good communication skills, and a team player.
Able to work independently in a fast-paced team and environment.
Preferred
SOC Integration and SOC verification expertise team with protocol experience on HBI, HBM, UCIe, PCIe, Ethernet, LPDDR5, DFT
Design, Verification and Implementation (Linit, CDC, RDC, Constraints)
Strong UVM and SV candidates
Company
HCLTech
HCLTech is a global technology company, home to more than 224,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products.
H1B Sponsorship
HCLTech has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Trends of Total Sponsorships
2023 (2837)
2022 (3809)
2021 (3725)
2020 (4406)
Funding
Current Stage
Public CompanyTotal Funding
$220MKey Investors
Chrys Capital
2008-07-10Post Ipo Equity· $220M
2001-01-24IPO· nse:HCLTECH
Leadership Team
Recent News
Indus Business Line
2024-05-13
2024-04-28
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