Marvell Technology · 5 days ago

Physical Design Engineer

Santa Clara, CA

Full-time

Hybrid

Mid Level

$101K/yr - $151K/yr

3+ years exp

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Responsibilities

Work on physical design and methodology for future designs of high-performance chips.

Collaborate with a global team on triaging workflows, running RTL code, analyzing performance, and verifying power grids.

Engage with top-level engineers and designers, review completed runs, and optimize processes.

Interface with potential customers and contribute to sign-off checks for database readiness.

Qualification

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PnRCadenceSynopsysInnovusStatic Timing AnalysisPythonTclPerlEffective CommunicationPartition-level experienceMulti-hierarchy experience

Required

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience. Or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.

Candidate should have good knowledge on PnR and have handled complex blocks using latest technology nodes like 7nm, 5nm, 3nm.

Should have exposure in multiple tool usage across Cadence/Synopsys platforms, especially Innovus

Knowledge of static timing analysis and synthesis

Skilled knowledge on scripting language i.e. Python, Tcl, Perl

Effective communication, verbal, and written skills