200+ applicants

Company

Original Job Post

Synopsys Inc · 1 week ago

Physical Design Engineer

Mountain View, CA

Full-time

Onsite

Mid Level

$97K/yr - $145K/yr

3+ years exp

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Electronic Design Automation (EDA)Information Services

H1B Sponsorship

Hiring Manager

Alex Sorlut

Insider Connection @Synopsys Inc

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Responsibilities

Scripting, debugging, testing, and maintaining timing flows and methodologies.

Documentation, synthesis, Place & Route, Static timing closure, constraints analysis, static and dynamic IR drop analysis, power estimation, electromigration checks, and physical verification tasks such as DRC/LVS/ERC.

Independently find solutions to complex design implementation issues and suggest improvements to the design methodology and flow.

Create views necessary for SOC integration of hard macros and run all required QA checks before releasing views.

Qualification

Find out how your skills align with this job's requirements. If anything seems off, you can easily click on the tags to select or unselect skills to reflect your actual expertise.

Electrical EngineeringDigital DesignPhysical DesignScripting SkillsCAD AutomationTiming ConstraintsStatic Timing AnalysisBlock-Level DesignLow-Power DesignFinFET NodesTSMC NodesSynopsys ToolsRTLPhysical VerificationSTAFormal VerificationEM/IRDFTLogic DesignDesign-for-TestSignal IntegrityPower IntegrityProblem-SolvingCommunication

Required

A degree in Electrical/Electronic Engineering (or equivalent) with 3+ years of digital or physical design experience.

Excellent software and scripting skills (Perl, Tcl, Python), understanding of CAD automation methods.

Strong understanding of timing constraints and static timing analysis.

Proven ability to handle broad responsibility for block-level digital physical design from RTL to GDSII signoff.

Experience with advanced FinFET nodes, TSMC 16 nanometer or below, including low-power design techniques (ex: FinFET, 16nm, 12nm, 7nm, 5nm, 3nm).

Experience with Synopsys tools or other equivalent tools for Synthesis, P&R, Physical verification, STA, Formal, EM/IR, DFT

Understanding of digital logic and RTL circuit representation.

Understanding of common design-for-test (DFT) implementation techniques.

Understanding of signal integrity and power integrity.

Excellent communication skills, ability to think and communicate at different levels of abstraction.

Preferred

Master’s degree is preferred.

Benefits

Health, wellness, and financial benefits

Annual bonus

Equity

Other discretionary bonuses

Company

Synopsys Inc

Glassdoor

4.0

Catalyzing the era of pervasive intelligence, Synopsys delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation.

Founded in 1986

Mountain View, California, USA

10,001+ employees

http://www.synopsys.com

H1B Sponsorship

Synopsys Inc has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

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2020 (193)