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Quadric · 3 days ago
Logic Design Engineer
San Francisco Bay Area
Full-time
Hybrid
Senior Level
5+ years exp
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Responsibilities
Contribute to the definition of the processor architecture by understanding its applications
Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog
Own Power, Performance & Area (PPA) optimization
Contribute to timing closure through full product cycle (front end, back-end, tapeout)
Qualification
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Required
BS/MS or Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ASIC front-end design
Proficiency in SystemC, SystemVerilog, or Verilog
Strong background in computer architecture
Knowledge of design techniques for low power digital design
Knowledge of VCS & Verilog/C Co-Sim
Experience in data-parallel hardware design for high-performance computing
Experience in logic synthesis and performance modeling
Preferred
Experience in FPGA design is a plus
Familiarity with automotive safety (ASIL) standards
Benefits
Politics free community
Opportunity for long term career relationships
Environment for lasting personal relationships alongside professional ones
Company
Quadric
Quadric is a Semiconductor IP licensor. Quadric's GPNPU processor blends machine learning inference performance with DSP programmability.
11-50 employees
Funding
Current Stage
Growth StageTotal Funding
$43.75MKey Investors
DensoNSITEXEPear VC
2022-12-15Series B· $5.5M
2022-12-15Debt Financing· Undisclosed
2022-03-16Series B· $21M
Leadership Team
Veerbhan Kheterpal
Co-founder & CEO
Daniel Firu
Co-founder & Chief Product Officer
Recent News
2023-09-15
2023-06-21
Company data provided by crunchbase
