Insight Global · 12 hours ago
Senior Physical Design Engineer
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Responsibilities
Work well with cross-functional team members both within our clients’ team and with their customers to meet their SOC development objectives.
Perform Physical design for SOC verification and chip engineering and implementation.
Conduct Floor planning, clock insertion, prime time, physical verification, and tape out.
Qualification
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Required
10+ years of related experience
Synopsys Fusion Compiler/ICC2 (Synthesis, DFT insertion, Place & Route, Chip Finishing, PT-SI STA, Timing Closure, PV (DRC/ERC/PERC/LVS)
Synopsys Flow Development & SOC implementation methodologies that will be deployed and used by our Synopsys customer Physical Design Implementation team members
Experience with top-level floorplanning, bump-maps, RDL IO Pad/Ring creation/verification, power grid creation/verification, hierarchal floorplanning/partitioning
Solid experience with full SOC clocking methodologies (H-Tree, Structure Clocking, MS CTS for Top/Blocks with push/down & bottoms up approaches)
Synopsys Formality for formal verification (RTL to Gate, Gate-to-Gate) & Formality ECO flows
Preferred
Familiar with Synopsys Lynx a plus
Experience with GlobalFoundries, TSMC, & Samsung technology nodes are a plus
RTL Hand-over experience a plus for RTL to GDS
Company
Insight Global
Insight Global provides top talent and staffing solutions that help job seekers find careers in healthcare, finance, IT, and government.
H1B Sponsorship
Insight Global has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2023 (66)
2022 (19)
2021 (5)
2020 (2)
Funding
Current Stage
Late StageTotal Funding
unknown2010-07-01Acquired· by Harvest Partners
Company data provided by crunchbase