Design Verification Engineer @ Pyramid Consulting, Inc | Jobright.ai
JOBSarrow
RecommendedLiked
0
Applied
0
External
0
Design Verification Engineer jobs in Burlingame, CA
34 applicantsPosted by Agency
company-logo

Pyramid Consulting, Inc · 1 day ago

Design Verification Engineer

ftfMaximize your interview chances
ConsultingInformation Technology
check
Growth Opportunities
check
H1B Sponsor Likelynote

Insider Connection @Pyramid Consulting, Inc

Discover valuable connections within the company who might provide insights and potential referrals.
Get 3x more responses when you reach out via email instead of LinkedIn.

Responsibilities

Remote Opportunity/Candidates in Pacific time zone will be preferred
We are looking for a Design Verification Engineer with 5-15years of relevant experience.
This position is an Remote opportunity (Candidates in Pacific time zone will be preferred).
Understanding of Ethernet / project specifications.
Writing Test plan and coverage plan.
Write testcases/scenarios.
Update existing testbench components like generators, drivers, and monitors.
Debug existing tests failing in the regression.
Work on Subsystem and system level verification.

Qualification

Find out how your skills align with this job's requirements. If anything seems off, you can easily click on the tags to select or unselect skills to reflect your actual expertise.

Design VerificationSystemVerilogUVMSynopsys VCSCadence IncisiveFPGA ValidationUPFC/C++PythonASIC DesignFormal Property VerificationTCLPower Aware GLSComplex SoCsCoverage Merging

Required

5-15 years of relevant experience
Understanding of Ethernet / project specifications
Writing Test plan and coverage plan
Write testcases/scenarios
Update existing testbench components like generators, drivers, and monitors
Debug existing tests failing in the regression
Work on Subsystem and system level verification
Key skills; Design Verification, Synopsis, ASIC Design, FPGA Validation, UPF, SystemVerilog (SV/UVM)
5+ years of proven experience as a DV engineer
Hands on experience with SV (SystemVerilog) and UVM (Universal Verification Methodology)
Hands on Experience with Synopsys VCS / Verdi or Cadence Incisive tools
Experience with UPF based simulation flow
2+ Years of experience with C/C++
TCL and Python (or similar) scripting language
Power and performance FPGA validation
Python Scripting
Experience with Power Aware GLS flow
ASIC design experience
Experience in formal property verification of complex compute blocks like DSP, CPU or HW accelerators
Experience with complex SoCs
Knowledge of coverage merging across simulation and formal

Preferred

Remote Opportunity/Candidates in Pacific time zone will be preferred

Benefits

Health insurance (medical, dental, vision)
401(k) plan
Paid sick leave (depending on work location)

Company

Pyramid Consulting, Inc

company-logo
Pyramid Consulting, a global leader in workforce and technology solutions, empowers individuals and organizations to transform and thrive in the most challenging and competitive markets.

H1B Sponsorship

Pyramid Consulting, Inc has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2023 (77)
2022 (60)
2021 (62)
2020 (93)

Funding

Current Stage
Late Stage

Leadership Team

leader-logo
Sanjeev Tirath
Founder & CEO
linkedin
Company data provided by crunchbase
logo

Orion

Your AI Copilot