DSP Architect with ultra-low-power Design @ Accord Technologies Inc | Jobright.ai
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DSP Architect with ultra-low-power Design jobs in United States
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Accord Technologies Inc ยท 15 hours ago

DSP Architect with ultra-low-power Design

positionUnited States
timeContract
remoteRemote
seniorityMid Level
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Information Technology & Services
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Responsibilities

This position requires a combination of strong algorithmic knowledge, ASIC design skills, and low-power optimization expertise to deliver efficient, functional digital solutions.
The successful candidate will be instrumental in driving the design and implementation of advanced digital systems within power constraints, ensuring optimal performance for our ASIC products.
ASIC Design Engineer - need to have good algorithm understanding, hardware/software partition, RTL design/implementation experience.
Selection of suitable low-power DSP core IP
Definition of digital subsystem including memory subsystem
Investigation and definition of clock architecture to run I3C protocol based on external clock provided by I3C interface
Digital implementation of digital algorithms (based on Matlab algorithms from customer) and proving they can run efficiently on the DSP with less than 50uW of power consumption
The whole ASIC has a power budget of 400uW
Assist analog team on template detection algorithm and analog/digital trade-offs

Qualification

Find out how your skills align with this job's requirements. If anything seems off, you can easily click on the tags to select or unselect skills to reflect your actual expertise.

Algorithm expertiseASIC designLow-power optimizationRTL design implementationHardware/Software partitionDigital implementationI3C protocolMemory subsystem definitionMatlab algorithmsTemplate detection algorithm

Required

Good understanding and experience with Hardware/Software partition
Algorithm expertise
RTL design implementation experience
Strong algorithmic knowledge
ASIC design skills
Low-power optimization expertise
Selection of suitable low-power DSP core IP
Definition of digital subsystem including memory subsystem
Investigation and definition of clock architecture to run I3C protocol based on external clock provided by I3C interface
Digital implementation of digital algorithms (based on Matlab algorithms from customer) and proving they can run efficiently on the DSP with less than 50uW of power consumption
Ability to work within a power budget of 400uW
Assist analog team on template detection algorithm and analog/digital trade-offs

Company

Accord Technologies Inc

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We are one of the pioneers in Information technology consulting and staffing industry.
location
Cheyenne, Wyoming
people-size11-50 employees
web-link
http://www.accordtecinc.com

H1B Sponsorship

Accord Technologies Inc has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2022 (5)
2021 (1)
2020 (3)

Funding

Current Stage
Early Stage
Company data provided by crunchbase
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Orion

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