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Silvus Technologies · 1 day ago

Principal FPGA / RTL Design Engineer

Irvine, CA

Full-time

Hybrid

Lead/Staff

$165K/yr - $250K/yr

10+ years exp

Silvus Technologies is dedicated to connecting those who keep us safe through advanced Mobile Ad-hoc Network radios. The Principal FPGA / RTL Design Engineer will be involved in the research and development of FPGA designs for MIMO wireless networking products, focusing on signal processing algorithms from concept to deployment.

Information TechnologyRoboticsTelecommunicationsWired TelecommunicationsWireless

Growth Opportunities

No H1B

U.S. Citizen Only

Responsibilities

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks

RTL coding, simulation, and test bench development

FPGA synthesis and timing closure

Hardware verification and troubleshooting; familiarity with logic analyzers

Provide support to the RF and Software Engineering Teams

Qualification

RTL designFPGA implementationVerilogSystem-VerilogXilinx FPGAsVivado IDEDigital signal processingMATLABPerlPythonCommunication skillsPresentation skills

Required

Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields

Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or relevant fields

Demonstrated experience with fixed point binary arithmetic and digital signal processing designs

Deep knowledge of RTL design fundamentals using Verilog and System-Verilog

Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs

Experience with Xilinx FPGAs, SoCs, and the Vivado IDE

Must be a U.S. Citizen due to clients under U.S. government contracts