Etched · 7 hours ago
Substrate IC Package Layout Design Engineer
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
$150K/yr - $275K/yr
10+ years expEtched is building the world’s first AI inference system purpose-built for transformers, delivering over 10x higher performance and lower cost and latency. As a Substrate IC Package Layout Design Engineer, you will be responsible for the end-to-end design of complex IC substrate packages, focusing on high-power consumption and high-speed signaling.
AI InfrastructureArtificial Intelligence (AI)ComputerHardwareSemiconductor
Responsibilities
IC Substrate Layout Design
Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators
Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements
Ensure robust power delivery designs capable of supporting >700W custom silicon solutions
High-Speed Signal Routing & Integrity
Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk
Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout
Advanced Packaging & CoWoS Integration
Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance
Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability
Design Validation & Verification
Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs
Develop and maintain design documentation and guidelines for future substrate designs
Support design reviews and provide technical guidance to junior team members
Qualification
Required
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
10+ years of experience in IC substrate layout design for high-performance processors or accelerators
Extensive experience with large substrate packages (>50mm) and complex high-density layouts
Proven experience with high-power (700W+) package designs and robust power delivery networks
Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches)
Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWoS
Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification)
Deep understanding of SI/PI principles and how they apply to package-level design
Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment
Benefits
Full medical, dental, and vision packages, with generous premium coverage
Housing subsidy of $2,000/month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to West San Jose
Company
Etched
Building the hardware for superintelligence
51-200 employees
H1B Sponsorship
Etched has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (9)
2024 (11)
2023 (1)
Funding
Current Stage
Growth StageTotal Funding
$125.36MKey Investors
Primary Venture Partners
2024-06-25Series A· $120M
2023-05-16Seed· $5.36M
Leadership Team
Chris Zhu
Co-Founder
Robert Wachen
Co-Founder and President
Recent News
Soma Capital
2026-01-07
Google Patent
2025-04-02
Google Patent
2024-12-04
Company data provided by crunchbase