Sr. Principal DSP Architect jobs in United States
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Astera Labs · 4 months ago

Sr. Principal DSP Architect

positionSan Jose, CA
timeFull-time
remoteOnsite
senioritySenior Level
money$160K/yr - $260K/yr
date5+ years exp

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. As a Sr. Principal DSP Architect, you will develop advanced DSP SerDes for next generation 400G per lane wireline and optical interconnect for AI systems, involving research, algorithm creation, and performance optimization.

AutomotiveElectronicsIntelligent SystemsSemiconductor
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H1B Sponsor Likelynote

Responsibilities

Research novel modulation, equalization, and FEC techniques for 400G per lane wireline and optical systems
Create DSP and FEC algorithms, bit/cycle accurate C/C++ models, and hardware block specifications appropriate for RTL implementation
Work with digital team/firmware team to optimize and implement DSP algorithms in hardware/firmware
Hands-on involvement in post-silicon performance tuning and optimization
Provide guidance on test plans for lab characterization
Provide support for internal customers deploying SerDes IP

Qualification

DSP algorithm developmentDigital communication theoryC/C++ programmingMatlab programmingPython programmingVerilog RTL knowledgeError correction techniquesVersion control systemsHigh-speed optical channelsHigh-speed electrical channels

Required

Master's degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience with DSP architectures and algorithm development
Solid understanding of and experience with designing adaptive DSP algorithms
Solid understanding of and experience with the practical aspects of digital communication and signal processing theory, including channel equalization, timing recovery, detection, and estimation
Good programming skills in C/C++, Matlab or Python
Experience in guiding and testing the transfer of high-speed numerical algorithms from C/C++ to Verilog

Preferred

Familiarity with high-speed optical and electrical channels and the DSP algorithms for compensating their impairments
Reading knowledge of Verilog RTL and the ability to assist with the assessment of Verilog implementations of DSP algorithms
Experienced with modern version control and software management systems
Experience with error correction (Reed-Solomon, BCH, soft decoding) in high-throughput, low-latency systems

Company

Astera Labs

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Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
dateFounded in 2017
location
San Jose, California, USA
people-size201-500 employees
web-link
https://www.asteralabs.com

H1B Sponsorship

Astera Labs has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)

Funding

Current Stage
Public Company
Total Funding
$206.35M
Key Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M

Leadership Team

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Jitendra Mohan
CEO
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Casey Morrison
Chief Product Officer, Co-Founder
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