Ampere · 2 days ago
Principal Physical Design Engineer
Santa Clara, CA
Part-time
Onsite
Senior Level, Lead/Staff
$152K/yr - $254K/yr
6+ years expAmpere is a semiconductor design company leading the future of computing with innovative CPU design focused on high-performance and energy efficiency. The Principal Physical Design Engineer will focus on CPU/GPU physical design and interconnect integration, collaborating with various teams to ensure robust designs that meet performance and power requirements.
Cloud ComputingCloud Data ServicesHardwareSemiconductor
Responsibilities
Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network
Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view
Implement power and clock domain crossing with UPF and timing methodologies
Converge timing on high speed interface with appropriate methods of clock balancing and skewing
Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization
Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals
Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications
Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges
Develop scripts and automation flows to improve design efficiency and quality
Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise
Document design methodologies, best practices, and integration guidelines specific to Ampere’s CPU/GPU physical design flows
Collaborate and work with cross geo teams in India & Vietnam
Qualification
Required
Experience in high performance/low power physical design with a focus on CPU and/or GPU architectures
Proven expertise in both CPU physical design and interconnect integration/implementation
Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below)
Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below)
Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus)
Experience with scripting languages (Tcl, Python) for automation and tool customization
Excellent problem-solving skills and ability to work effectively in cross-functional teams
Effective communication skills to collaborate with design, verification, and manufacturing teams
Electrical or Computer Engineering - Bachelor's degree & 8 years of related experience; or Master's degree & 6 years; or PhD & 3 years
Benefits
Premium medical insurance
Dental insurance
Vision insurance
Income protection
401K retirement plan
Unlimited Flextime
10+ paid holidays
A variety of healthy snacks
Energizing espresso
Refreshing drinks
Company
Ampere
Ampere is a modern semiconductor company designing the future of hyperscale cloud and edge computing with the world’s first Cloud Native Processors.
1001-5000 employees
H1B Sponsorship
Ampere has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (52)
2024 (50)
2023 (61)
2022 (56)
2021 (52)
2020 (30)
Funding
Current Stage
Late StageTotal Funding
$813.8MKey Investors
OracleThe Carlyle Group
2025-03-20Acquired
2022-04-01Secondary Market· $127.8M
2022-04-01Convertible Note· $300M
Leadership Team
Renee James
Founder, Chairman & CEO
Todd M. Underwood
Chief Financial Officer
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2025-12-31
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