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TetraMem - Accelerate The World · 1 month ago

ASIC/SoC Design Verification Engineer

San Jose, CA

Full-time

Onsite

Senior Level, Lead/Staff

$110K/yr - $300K/yr

8+ years exp

TetraMem is a company focused on accelerating technology solutions. They are seeking an ASIC/SoC Design Verification Engineer to collaborate with design engineers, develop test plans, and mentor junior engineers while ensuring effective verification processes.

Computer Hardware

H1B Sponsor Likely

Responsibilities

Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification

Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance

Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral module for both of block levels and system levels

Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out

Work with design engineers to debug and identify root causes of simulation failure

Support test engineers for post-silicon validation

Mentor and coach team members and junior engineers. Drive verification efficiency

Qualification

UVM/OVMVerilogSystem VerilogTestbench developmentPythonC/C++MIPIRISC-V/ARMTeam playerTechnical leadership

Required

MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree

In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology

Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification

Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding

Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core

Experience in verifying designs at both of RTL level and post-P&R gate level

Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team

Preferred

Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators

Experience in verifying mix-signal design and interface of digital and analog

Experience of design verification for highspeed IO such as PCIE and DDR

Company

TetraMem - Accelerate The World

TetraMem is developing cutting-edge analog computing solutions for AI applications, offering exceptional performance with ultra-low power consumption.

Founded in 2018

Newark, California, USA

51-200 employees

https://www.tetramem.com/

H1B Sponsorship

TetraMem - Accelerate The World has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (11)

2024 (10)

2023 (2)

2022 (1)

2021 (3)

2020 (1)