Sr. Physical Design Methodology Engineer, Annapurna Labs jobs in United States
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Amazon · 5 months ago

Sr. Physical Design Methodology Engineer, Annapurna Labs

Amazon's Annapurna Labs is a leader in designing silicon and software for cloud solutions. The Sr. Physical Design Methodology Engineer will focus on developing and optimizing physical design methodologies for ML Accelerator chips, ensuring high design quality and efficiency in hardware design processes.

Artificial Intelligence (AI)DeliveryE-CommerceRetail
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Responsibilities

Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes
Drive Optimizations in CAD flows/methodologies for PPA and TAT improvements
Work with EDA tool vendors to evaluate new methods, resolve bugs, improve usability
Fine tune cloud infrastructure to improve compute and storage utilization for physical design work
Interface directly with RTL, Physical Design, Package Design, DFT teams to improve methodologies and efficiencies
Be able to independently troubleshoot digital tool flow usage and deploy solutions
Fluent in scripting languages such as TCL, Python, etc. and able to build scalable and efficient flows to support parallel design developments
Create Dashboard and Central reports for project tracking and visualizing QoR/stats

Qualification

Physical design methodologyASIC physical designProgramming/scripting languagesPD tools expertiseHigh-performance design techniquesMachine learning experienceCommunication skillsMentorship abilitiesTeam player

Required

BS + 10yrs or MS + 7yrs in EE/CS
5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced technology nodes
Proficient in programming/scripting languages (Perl, Python, C++)
Solid understanding of ASIC physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification
Demonstrated level of expertise in PD tools such as Innovus, ICC2, Fusion Compiler, STA, and Sign-Off
Proven track record of delivering metric driven PPA flow development and support

Preferred

Expertise in high-performance, low-power physical design, and implementation techniques with industry standard synthesis, PnR, or Signoff tools
Excellent programming skills in languages like Python, Perl, TCL, Shell, etc. Good understanding of algorithms with emphasis on optimizing algorithms
Knowledge of technology nodes across foundries
Experience in evaluating multiple vendor solutions and driving tool decisions
Knowledge of creating dashboards and status reports for various EDA tool outputs, QOR metrics and analyzing trends (synthesis, pnr, signoff etc)
Experience with machine learning
Excellent verbal and written communications
Ability to work in dynamic work environment with changing needs and requirements
Ability to provide mentorship, guidance to junior engineers and be a effective team player
Meets/exceeds Amazon's leadership principles requirements for this role
Meets/exceeds Amazon's functional/technical depth and complexity for this role

Benefits

Equity
Sign-on payments
Full range of medical, financial, and/or other benefits

Company

Amazon is a tech firm with a focus on e-commerce, cloud computing, digital streaming, and artificial intelligence.

Funding

Current Stage
Public Company
Total Funding
$8.11B
Key Investors
Kleiner Perkins
2023-01-03Post Ipo Debt· $8B
2001-07-24Post Ipo Equity· $100M
1997-05-15IPO

Leadership Team

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Douglas J. Herrington
CEO, Worldwide Amazon Stores
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Werner Vogels
VP & CTO
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