Cadence · 17 hours ago
Lead Digital Verification Engineer
Mount Royal, NJ
Full-time
Onsite
Senior Level
CA$90K/yr - CA$166K/yrCadence is a technology company focused on developing leaders and innovators in the field. The Lead Digital Verification Engineer will be responsible for the verification of digital RTL and the development of reusable verification components, contributing to all aspects of digital verification including flow development and test plan execution.
AerospaceElectronic Design Automation (EDA)HardwareMobileSemiconductorSoftware
Responsibilities
Verification of digital RTL
Development of re-usable verification components and environments
Contribute to all aspects of digital verification including flow development, test plan development and execution, functional coverage closure, and code coverage closure
Accurately and efficiently communicate with all members of the technical staff regarding overall project development progress and status
Collaborate successfully as needed with design teams, verification teams, project management, and digital and analog design teams in multiple worldwide geographies
Qualification
Required
Bachelor of Science in Electrical(EE)/Computer Engineering (CPE) or Computer Science (CSC)
Understanding of verification architecture and methodologies
Understanding of Metric Driven Verification
Understanding of Universal Verification Methodologies
Understanding of the identification, planning and creation of functional coverage and checks
Understanding of System Verilog Assertions (SVAs)
Understanding of digital design flow
Ability to work independently to complete assigned tasks within required project timelines with high quality
Excellent command of fundamental logic principles
Excellent problem solving and communication skills
Ability to work as part of a small and focused team of engineers
Willingness to work full time in the Montreal, Quebec, Canada office
Willingness to travel as required by job function (expectation is 5% travel or less)
Preferred
Master of Science in EE/CPE/CSC
Experience with SystemVerilog UVM coding language is desired
Experience with scripting languages such as Python, Perl, Ruby, Sed, or Awk is also strongly preferred
Exposure to Standard Protocol knowledge for any of the following areas: PCIe, USB, SATA, Ethernet, Display Port, HDMI
Exposure to Formal Verification Technologies
Exposure to Mixed Signal Design experience
Experience with Cadence tools experience
Exposure to Low Power verification experience using CPF or UPF
Benefits
Paid vacation and holidays
Leave of absence programs
Registered Retirement Savings Plan (RRSP)
Tax Free Savings (TFSA) plan for post-tax investment savings
Employee Stock Purchase Plan
Group health coverage that includes dental, vision and Emotional Wellbeing Support (EAP) benefits for you and your eligible dependents
Employee and dependent Life insurance
Short-term and long-term disability
Global Travel Medical coverage
Business Travel Accident Insurance
Funded Lifestyle Spending Account (LSA)
Company
Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems.
Founded in 1988
10001+ employees
H1B Sponsorship
Cadence has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (306)
2024 (221)
2023 (282)
2022 (330)
2021 (233)
2020 (209)
Funding
Current Stage
Public CompanyTotal Funding
unknown1998-02-20IPO
Leadership Team
Anirudh Devgan
President and CEO
Paul Cunningham
Senior Vice President and General Manager
Recent News
2026-02-03
2026-01-17
Company data provided by crunchbase