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Tenstorrent · 1 day ago

Sr. Staff Engineer, Emulation Validation Lead

Austin, Texas Metropolitan Area

Full-time

Hybrid

Senior Level, Lead/Staff

$100K/yr - $500K/yr

7+ years exp

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. They are seeking an Emulation Validation Lead to architect and drive the emulation validation strategy across both pre-silicon and post-silicon phases, ensuring AI/ML architectures meet performance and functional requirements.

AI InfrastructureApplication Specific Integrated Circuit (ASIC)Artificial Intelligence (AI)ElectronicsMachine LearningSemiconductor

Comp. & Benefits

No H1B

U.S. Citizen Only

Responsibilities

Architect and drive our emulation validation strategy across both pre-silicon and post-silicon phases

Build validation infrastructure from the ground up

Establish best practices

Mentor a growing team of engineers

Collaborate closely with design teams

Work with hardware resources in Toronto

Partner with emulation platform vendors to push the boundaries of validation efficiency

Qualification

Emulation validationHardware validationSystemVerilogCommercial emulation platformsPre-silicon validationPost-silicon validationTechnical leadershipCollaborationMentoringProblem-solvingAdaptability

Required

A seasoned validation architect with 7+ years of hands-on experience in emulation-based validation, spanning both pre-silicon verification and post-silicon bring-up environments

A technical leader who thrives on building teams and mentoring engineers, capable of establishing validation methodologies and best practices while remaining hands-on when needed

A systems thinker who understands the full validation lifecycle—from RTL simulation and emulation testbench development through silicon failure analysis and debug

Collaborative by nature, with a track record of working across geographically distributed teams, partnering with design engineers, architects, and external vendors to solve complex problems

Resilient and adaptable, comfortable with ambiguity and excited by the challenge of building validation infrastructure from scratch in a fast-paced startup environment

Driven by impact, motivated by the opportunity to shape validation strategy for cutting-edge AI/ML processors and own outcomes that directly affect product success

BS/MS/PhD in EE, Computer Science, or similar with 7+ years of industry experience in hardware validation and emulation (10+ years preferred for senior leadership levels)

Deep expertise with commercial emulation platforms including Palladium, Veloce, ZeBu, HAPS, or custom FPGA-based emulation solutions, with proven experience optimizing emulation performance and capacity

Strong programming and verification skills in SystemVerilog, Verilog, and industry-standard testbench methodologies (UVM/OVM), including assertions, coverage analysis, and debug tools/waveform viewers

Proven experience in both pre-silicon and post-silicon validation, including test plan development, test execution, regression frameworks, and failure analysis for complex SoC or CPU designs

Technical leadership experience building or leading validation teams, establishing processes, and driving cross-functional initiatives with design, architecture, and software teams

Self-assessment confidence in emulation and DV/simulation environments, with the ability to architect end-to-end validation strategies and make critical technical tradeoffs