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Samsung Ads · 4 months ago

Lead Performance Architect (Principal Engineer)

3900 N Capital of Texas Hwy, Austin, TX, USA

Full-time

Onsite

Senior Level, Lead/Staff

$222K/yr - $332K/yr

20+ years exp

Samsung, a world leader in advanced semiconductor technology, is seeking a Lead Performance Architect to join their System IP team. In this role, you will be responsible for designing and optimizing the performance of System IP, developing performance models, and collaborating with cross-functional teams to enhance system efficiency.

Marketing & Advertising

Responsibilities

You have proven experience leading a team to develop and maintain cycle-accurate C++ performance models for System IP components, while also contributing hands on

You analyze system performance using various metrics, such as latency, throughput, and power consumption, to identify bottlenecks and optimization opportunities

You develop and maintain performance analysis tools

You collaborate with cross-functional teams, including architecture, design, and software teams, to identify and implement performance optimization opportunities

You develop and run benchmarks to characterize system performance and identify areas for improvement

You provide technical guidance and mentorship to junior engineers and contribute to the development of best practices and standards for performance modeling and analysis

You work closely with other teams, including CPU, GPU, and SoC architecture teams, to ensure that System IP components meet performance and power requirements

Qualification

Performance modelingC++ codingSystem IP optimizationComputer architectureMemory subsystem experiencePerformance analysis toolsAnalytical skillsPython programmingData analysisVisualization skillsEmerging technologiesTechnical leadershipMentoring skills

Required

20+ years of experience with a Bachelor's Degree in Computer Science/Engineering, or 18+ years of experience with a Master's Degree, or 16+ years of experience with a PhD

Expertise in performance modeling, analysis, and optimization, with a focus on System IP components

Strong C++ coding skills, with experience developing cycle-accurate performance models and analysis tools

Strong understanding of computer architecture, microarchitecture, and system-level performance optimization

Excellent analytical and problem-solving skills, with the ability to identify and optimize performance bottlenecks

Strong technical leadership and mentoring skills, with experience guiding junior engineers

Must be local, or open to relocating, to Austin, TX

Preferred

Professional experience in memory subsystem or interconnect, with knowledge of memory hierarchy, memory access patterns, bandwidth, and latency optimization, is a big plus

Proficiency in performance modeling tools such as SystemC, Gem5, or similar

Experience with industry standard RTL design tools and methodologies

Programming skills in Python or R, with experience in data analysis, visualization, and automation

Familiarity with emerging technologies, such as AI, ML, and autonomous systems, and their impact on System IP performance