PCIe ASIC Design Engineer jobs in United States
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Cornelis Networks · 1 hour ago

PCIe ASIC Design Engineer

Cornelis Networks delivers high-performance scale-out networking solutions for AI and HPC datacenters. They are seeking a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into their next-generation SoCs, requiring deep expertise in the PCI Express protocol and integration into high-performance ASICs.

Artificial Intelligence (AI)Information TechnologySoftware
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H1B Sponsor Likelynote

Responsibilities

Own end-to-end integration of PCIe IP into complex ASIC designs
Collaborate with IP vendors, architecture, verification, physical design, and software teams to deliver robust PCIe subsystems
Drive performance optimization efforts across the PCIe stack, from PHY tuning to DMA/transaction layer efficiency
Contribute to system architecture and microarchitecture discussions with a focus on IO and interconnect scalability
Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware teams
Debug functional and performance issues at RTL, gate-level, and silicon
Ensure compliance with PCIe specifications and participate in interoperability testing where needed
Provide mentorship to junior engineers and help define PCIe subsystem development best practices
Good understanding of high-bandwidth, low-latency connectivity for high-performance compute platforms

Qualification

PCI Express protocolASIC/SoC designSilicon bring-upPerformance tuningPython scriptingVerification environmentsCommunication skillsMentorship

Required

BS/MS in Electrical Engineering, Computer Engineering, or related field
10+ years of industry experience in ASIC/SoC design with a focus on PCIe controller integration
Proven experience in silicon bring-up and debug of high-speed interfaces
Solid understanding of PCIe protocol stack (PHY, MAC, TLP, DLL), configuration space, and link training
Hands-on experience with PCIe verification environments, performance tuning, and power-aware design
Familiarity with PCIe compliance testing, simulation tools (e.g., VCS, Questa), and lab equipment (e.g., protocol analyzers, oscilloscopes)
Strong scripting (Python, Perl, TCL) and debugging skills
Strong verbal and written communication skills

Preferred

Experience with PCIe Gen5/Gen6 and advanced retimer or switch solutions
Exposure to CXL, CCIX, or other cache-coherent interconnects
Background in data center or AI/ML accelerator architectures
Experience with emulation and prototyping platforms (e.g., ZeBu, Palladium, HAPS) for PCIe subsystem validation

Benefits

Health and retirement benefits
Medical, dental, and vision coverage
Disability and life insurance
Dependent care flexible spending account
Accidental injury insurance
Pet insurance
Generous paid holidays
401(k) with company match
Open Time Off (OTO)
Sick time
Bonding leave
Pregnancy disability leave

Company

Cornelis Networks

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Cornelis Networks develops purpose-built fabrics for scientific, commercial, and government organizations.

H1B Sponsorship

Cornelis Networks has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (6)
2024 (2)
2023 (1)
2022 (2)
2021 (1)

Funding

Current Stage
Growth Stage
Total Funding
$93.3M
Key Investors
IAG Capital PartnersDowning Ventures
2024-03-12Series B· $25M
2023-08-24Series Unknown· $19.3M
2022-11-14Series B· $29M

Leadership Team

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Lisa Spelman
CEO Cornelis Networks
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Philip Murphy
Co-Founder, President, and Chief Operating Officer
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Recent News

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