Senior ASIC Physical Design and Timing Engineer jobs in United States
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NVIDIA · 13 hours ago

Senior ASIC Physical Design and Timing Engineer

NVIDIA is a leading company in AI computing, continuously evolving and innovating in the tech industry. They are seeking a motivated ASIC Timing Engineer to drive timing analysis and closure of their GPUs, CPUs, DPUs, and SoCs, while collaborating with cross-functional teams to improve timing convergence flows.

AI InfrastructureArtificial Intelligence (AI)Consumer ElectronicsFoundational AIGPUHardwareSoftwareVirtual Reality
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Growth Opportunities
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H1B Sponsor Likelynote

Responsibilities

Drive timing analysis and closure of Nvidia’s GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level
Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation
Work in a cross-functional environment interacting with multiple teams
Apply knowledge and experience to improve timing convergence flows working with the methodology teams

Qualification

Static Timing AnalysisTiming Constraints ManagementPhysical Design OptimizationLogic SynthesisEDA Tools ProficiencyProgramming LanguagesECO ImplementationDeep Sub-micron TechnologyMethodology DevelopmentCross-functional Collaboration

Required

BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years experience or MS (or equivalent experience) with 2+ years experience in Synthesis and Timing
Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and timing convergence
Expertise in analysis and fixing of timing paths through ECOs including crosstalk and noise analysis
Expertise in physical design and optimization e.g., placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power, along with a background in implementing them through ECOs
Background in logic synthesis and equivalence checking/FV
Expertise and in-depth knowledge of industry standard EDA tools
Proficiency in programming and scripting languages, such as, Perl, Tcl, Python, etc

Preferred

Background in domain specific STA and timing convergence, such as CPUs, GPUs or Network processor implementation or SOCs
Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan shift and capture, transition faults, BIST, etc
Knowledge of deep sub-micron technology and associated process variations effects, including modeling and converging considering process variations
Experience in methodology and/or flow development as well as automation

Benefits

Equity
Benefits

Company

NVIDIA is a computing platform company operating at the intersection of graphics, HPC, and AI.

H1B Sponsorship

NVIDIA has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (1877)
2024 (1355)
2023 (976)
2022 (835)
2021 (601)
2020 (529)

Funding

Current Stage
Public Company
Total Funding
$4.09B
Key Investors
ARPA-EARK Investment ManagementSoftBank Vision Fund
2023-05-09Grant· $5M
2022-08-09Post Ipo Equity· $65M
2021-02-18Post Ipo Equity

Leadership Team

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Jensen Huang
Founder and CEO
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Michael Kagan
Chief Technology Officer
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Company data provided by crunchbase