Idaho Scientific ยท 4 months ago
ASIC Digital Design Engineer
Idaho Scientific is a company that combines the spirit of a startup with the stability of a corporation, focusing on secure system solutions. They are seeking an Entry Level ASIC Digital Design Engineer to collaborate on microarchitecture optimization, implement and simulate IP blocks, and contribute to design success from specification to production.
Cyber Security
Responsibilities
Collaborate with team leaders to explore and clearly identify real problems and solutions
Refine and improve the microarchitecture of Idaho Scientific IP to optimize performance, I/O, power consumption, area utilization, recurring cost and security functions
Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages
Integrate complex systems that instantiate both Idaho Scientific and third party IP
Contribute to all aspects of design success from specification to production
Apply our state-of-the-art IP to ASIC and FPGA products in the real world
Use high-quality design methods and processes to achieve excellent results
Work with other top-notch ASIC design engineers
Qualification
Required
US Citizenship (no exceptions)
Ability to get a security clearance
Solid technical understanding of FPGA or ASIC product development
Experience with SystemVerilog, VHDL, and Test-Driven Development principles
Ability to communicate clearly in person and in written documentation
Degree in Computer Engineering, Computer Science, Electrical Engineering or related field
In-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verification
Strong analytical and problem solving skills
Extreme attention to detail
A willingness to roll up one's sleeves to get the job done
Skilled at working effectively with cross functional teams
Preferred
At least 3 years of experience in FPGA or ASIC product development
US Security Clearance, Active or current within the last two years
Prior experience with FPGA emulation of complex RTL
Working knowledge of applied cryptography and cyber security topics
Experience applying principles of cyber security to operational technology and embedded system
Benefits
Competitive Pay
Flexible Work Schedule
Health Benefits and Insurance
Retirement fund contributions
Profit Sharing
Generous Paid Time Off Policy
Company
Idaho Scientific
Idaho Scientific specializes in high performance solutions to Anti-Tamper and Cyber Security problems.
Funding
Current Stage
Early StageRecent News
2025-12-02
2025-05-06
Google Patent
2025-02-16
Company data provided by crunchbase