Astera Labs · 1 day ago
Principal Lab Validation Engineer
San Jose, CA
Full-time
Onsite
Lead/Staff
$203K/yr - $230K/yr
10+ years expAstera Labs is a company providing rack-scale AI infrastructure through purpose-built connectivity solutions. The Principal Lab Validation Engineer will take a hands-on role in diagnosing customer quality concerns and developing corrective actions, collaborating with various engineering teams to ensure product readiness and reliability.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Directly root-cause failures to the circuit, package, firmware, or protocol-level interactions. Collaborate with design, validation, and system engineering teams as needed
Modify device firmware to test out engineering theories leading to potential fixes or production screens
Investigate failures such as link training issues, lane margining failures, eye closure, jitter sensitivity, protocol errors, and interoperability problems
Debug retimer specific failures, including pass-through path issues, clock forwarding problems, equalization settings, and link bring-up reliability
Analyze high speed link failures, including lane mapping, bifurcation errors, hot-plug issues, compliance test failures, and error propagation across multiple ports
Use advanced lab instrumentation (BERT, high-bandwidth oscilloscopes, protocol analyzers, VNAs, TDR, spectrum analyzers) to characterize and isolate failures
Develop and run stress tests and margining experiments to identify weak design or process corners
Provide feedback on system-level integration challenges for retimers and PCIe switches (e.g., board layout, equalization tuning, firmware interactions)
Drive physical failure analysis to isolate and image defects using methods such as fault isolation, probing, de-processing, FIB, thermal/voltage stress testing
Document debug findings, propose design/process/test improvements, and contribute to FA methodologies
Participate in new product development process to ensure readiness for customer returns before products are launched. Collaborating in the development of evaluation hardware (boards and sockets, including FA friendly sockets) and scripts
Qualification
Required
Minimum of a Bachelor's in Electrical Engineering while a Master's degree is preferred
Minimum of 10 years relevant experience of which 5 years' is hands-on mixed high-speed lab experience working with equipment such as protocol analyzers, BERT, real-time scopes, sampling scopes, TDR, and VNA
Python programming
Deep understanding of PCIe protocol (up through Gen6), retimer architecture, and SerDes signal integrity
Hands-on experience debugging retimers (equalization tuning, pass-through mode, clocking, reset/link sequencing)
Hands-on experience debugging PCIe switches (lane bifurcation, hot-plug, multi-port link stability, compliance failures)
Strong background in NRZ/PAM4 architectures, investigating issues with jitter, CDR/PLL behavior, equalization (DFE, CTLE, FFE), crosstalk, and power integrity
Experience in post-silicon validation and bring-up of high-speed PHYs or retimers
Solid problem-solving and analytical skills with ability to narrow down complex multi-layer failures
Strong written and verbal communication skills
Preferred
C (not C++)
Experience with optics
Experience with chip-level security and RAS features
ATE (Automated Test Equipment) Advantest V93K
Understanding of system-level architecture for servers, storage, and AI/ML platforms where PCIe retimers/switches are deployed
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
2025-12-29
thefly.com
2025-12-13
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