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AMD · 2 weeks ago

SR ASIC Verification Engineer

Santa Clara, CA

Full-time

Onsite

Senior Level

$136K/yr - $204K/yr

AMD is a leading provider of data center networking technology, committed to building great products that accelerate next-generation computing experiences. The SR ASIC Verification Engineer will be responsible for developing and executing test plans for ASIC verification, utilizing strong analytical skills to identify bugs and ensure functionality.

AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor

Growth Opportunities

No H1B

Responsibilities

Familiarity with UVM, System Verilog, and C or C++

Basic experience with System Verilog simulators and waveform debuggers

Exposure to developing and executing test plans for Unit/IP/Subsystem/SOC level verification

Experience in System Verilog test bench development, including stimulus, checkers, transactors/BFMs, assertions, and cover points

Ability to identify bugs in architecture, functionality, and performance, along with strong overall debug and analytical skills

Exposure to design and verification tools such as VCS or equivalent simulation tools and debugging tools like Debussy/DVE

Understanding of Computer Architecture concepts

Qualification

UVMSystem VerilogCC++System Verilog simulatorsDebugging toolsComputer ArchitectureAnalytical skillsProblem-solving skillsTeam collaborationEffective communication