Senior SoC Design Engineer jobs in United States
cer-icon
Apply on Employer Site
company-logo

Celestial AI · 3 months ago

Senior SoC Design Engineer

Celestial AI is a pioneering company in the field of generative AI, focusing on advanced data center infrastructure technologies. They are seeking a Senior SoC Design Engineer to contribute to the design, integration, and implementation of complex System-on-Chips (SoCs), working closely with high-speed interconnects and ASIC implementation.

Semiconductors
check
H1B Sponsor Likelynote

Responsibilities

Integrate and configure high-speed IPs (e.g., UCIe, CXL, PCIe, Serdes) into SoC designs
Define and integrate AXI-based Network-on-Chip (NoC) interconnects and subsystems
Collaborate effectively with cross-functional teams, including IP vendors, verification, and physical design, to ensure seamless integration and debug
Create the micro-architecture, RTL design, synthesis, and be responsible for design quality (Lint, CDC, and RDC)
Optimize RTL for power, performance, and area (PPA) goals
Work with pre-silicon verification teams to ensure design is verified
Provide inputs for the test plan covering functionality, corner cases, functional coverage
Run tests and debug, work with the verification team to close coverage, resolve design, timing, and protocol compliance issues in close collaboration with verification and firmware teams
Participate in post-silicon bring-up and debug efforts
Support emulation and FPGA-based prototyping for early IP validation

Qualification

SoC DesignRTL DesignASIC ImplementationHigh-speed InterfacesVerilog/SystemVerilogStatic Timing AnalysisEDA ToolsScripting (Tcl/Python)Problem-solvingCollaboration

Required

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
5+ years of hands-on experience in ASIC/SoC design, integration, and implementation
Strong experience in RTL design and integration using Verilog/SystemVerilog
Experience working with interconnect protocols like AXI
Experience integrating high-speed interfaces (e.g., UCIe, CXL, PCIe, DDR)
Hands-on experience with logic synthesis, static timing analysis (STA), and low-power design techniques
Proficiency with common EDA tools for synthesis and STA
Knowledge of physical design constraints, floorplanning, and the timing closure flow
Familiarity with pre-silicon verification methodologies (e.g., UVM)
Strong problem-solving skills with a methodical approach to debugging
Familiarity with post-silicon bring-up and debug techniques is a plus
Proficiency in scripting languages like Tcl or Python for automation and debug

Preferred

Experience working with UCIe/CXL/PCIe/Serdes would be a plus for this role

Benefits

Health, vision, dental and life insurance
Collaborative and continuous learning work environment

Company

Celestial AI

twitter
company-logo
AI is touching our lives and driving breakthroughs in healthcare, finance, autonomous systems, and countless other domains.

H1B Sponsorship

Celestial AI has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (15)
2024 (10)
2023 (4)
2022 (7)
2021 (1)

Funding

Current Stage
Growth Stage

Leadership Team

leader-logo
David Lazovsky
Founder, CEO
linkedin
Company data provided by crunchbase