Qualcomm · 2 days ago
Design Methodology Engineer
San Diego, CA
Full-time
Onsite
Mid, Senior Level
$140K/yr - $210K/yr
3+ years expQualcomm Technologies, Inc. is seeking a motivated Design Methodology Engineer to drive the development of advanced methodologies in die-level IR drop, static timing analysis, and power optimization. The engineer will collaborate with various teams to propose, develop, and validate new methodologies while working closely with CAD and design teams.
Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
Responsibilities
Develop and drive analysis and optimization methodologies for interaction of IR drop and STA
Develop physical-aware timing and IR drop ECO solutions
Collaborate closely with physical design and timing teams to drive methodologies to optimize power and minimize hotspots
Work with CAD and tool vendors to develop and validate new flows and methodologies
Work on design power profiling and electromigration analysis
Develop strategies for 3DIC PDN analysis and signoff
Qualification
Required
Expertise in static timing analysis. Hands-on experience with Primetime or Tempus
In-depth knowledge of physical design, preferably but not limited to on-chip power delivery network and power optimization
Strong background on power analysis concepts and on-hands experience with PTPX etc
Sound conceptual understanding of low power design techniques like voltage/power islands, power gating, clock gating, retention designs etc
Strong coding skills in languages such as Python, TCL, Perl
Strong methodology development background. Ability to drive solutions by creating and implementing algorithms
Strong analysis and communication skills
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience
OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
Preferred
MS/PhD degree in Science, Electrical/Electronics Engineering and 6+ years of industry experience
Hands-on experience with Redhawk/RHSC or Voltus, Innovus, ICC
Good insight in designing flows and software structure
Familiarity with post-silicon concepts, such as ATPG vectors and test, silicon debug, defect and parametric limited yield
Familiarity with HSPICE and transistor-level behavior
Experience in 3DIC design
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
10001+ employees
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
Leadership Team
Cristiano Amon
President and Chief Executive Officer
I
Isaac Eteminan
CEO
Recent News
PCMag.com - Technology Product Reviews, News, Prices & Tips
2026-01-06
2026-01-06
2026-01-06
Company data provided by crunchbase