Retym, Inc · 4 months ago
ASIC/VLSI Design Engineer
Austin, TX
Full-time
Onsite
Senior Level
5+ years expRetym, Inc is looking for talented and experienced VLSI Design Engineers/Micro-architects. In this role, you will have the opportunity to design innovative communication systems from scratch and collaborate with various teams throughout the design process.
ManufacturingSemiconductorTelecommunications
Responsibilities
Work closely with Algorithm and Architecture teams
Understand and translate high-level algorithmic requirements into efficient hardware implementations
Learn and analyze relevant protocols and standards
Interpret protocol specifications (e.g., Ethernet, etc.) and apply them accurately in design
Participate in all design stages:
Micro-architecture definition
RTL coding (using Verilog/SystemVerilog)
Synthesis-friendly coding and timing-aware design
Collaborate cross-functionally:
Verification team: For testbench development, debug support, and functional coverage closure
DFT team: Ensure design is scan-insertable, supports ATPG, BIST, etc
Backend/Physical design team: For floorplanning, timing closure, and routing feedback
Participate in Design Reviews
Present and defend design decisions in peer and formal reviews
Perform Synthesis and Timing Analysis
Generate synthesis constraints (SDC), run synthesis, and analyze timing reports
Debug and Fix Functional/Timing Issues
Collaborate in post-silicon or pre-silicon debug; use waveforms, assertions, and logic analyzers
Optimize for Area, Power, and Performance (PPA)
Identify bottlenecks and opportunities for improvement within RTL
Documentation
Maintain clear design documentation for reusability and reference (e.g., micro-architecture specs, interface docs)
Contribute to IP/SoC Integration
Work on integrating design blocks into larger systems and handling system-level interfaces
Participate in Silicon Bring-up and Validation (optional but valuable)
Support bring-up of first silicon and assist with post-silicon validation, if applicable
Keep up-to-date with Industry Trends and Tools
Learn new EDA tools, languages, and methodologies (e.g., CDC, Linting, Formal Verification)
Qualification
Required
+5 years of experience as ASIC/VLSI digital design engineer
Strong Verilog/System-Verilog experience
Familiar with simulation tools/environments, verification methodologies
Strong team player, solid interpersonal skills
Entrepreneurial can-do attitude, self-motivated, able to work independently
BS/MS in EE/CE from lead universities
Preferred
Familiar with advanced design practices (Clock/Voltage domain crossing, Low Power Design, DFT)
Design DSP of oriented blocks
Ethernet (100G and above)
Scripting experience using several of the following: Python, Perl, TCL
Company
Retym, Inc
AI is transforming industries at an unprecedented scale - but today’s data center infrastructure wasn’t built to keep up.
51-200 employees
H1B Sponsorship
Retym, Inc has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (1)
Funding
Current Stage
Late StageTotal Funding
$115.4MKey Investors
Spark Capital
2025-03-31Series D· $75M
2023-05-24Series Unknown· $40.4M
Recent News
2025-05-04
Google Patent
2025-05-04
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2025-04-07
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