ASIC Engineer, Formal Verification jobs in United States
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Meta · 3 days ago

ASIC Engineer, Formal Verification

Meta is hiring an ASIC Formal Verification Engineer within the Infrastructure organization. The role involves providing technical leadership in Formal Verification, developing formal test plans, and collaborating with various teams to ensure first-pass silicon success for data center applications.

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Comp. & Benefits

Responsibilities

Provide technical leadership in Formal Verification
Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at the top level and at the block level
Work with Architecture and Design team to come up with formal specification and implementation
Define formal verification scope, create formal environment and close coverage with targeted Formal Verification Techniques at IP, Subsystem and SoC level
Build reusable/scalable environments for Formal Verification and deploying the tools
Evaluate and recommend EDA solutions for Formal Verification
Provide training for internal teams and mentoring engineers related to Formal Verification Technology

Qualification

Formal VerificationDesign VerificationSystemVerilogPythonJasperGoldEDA solutionsScripting languagesAnalytical skillsCollaborationMentoring

Required

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
8+ years of experience in Design Verification
5+ years of experience in Formal Verification
Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etc
Proven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniques
Proven analytical skills to craft novel solutions to tackle industry-level complex designs
Demonstrated experience with effective collaboration with cross functional teams
Fluency in hardware description languages, such as SystemVerilog and SVA
Proficiency in scripting languages such as Python, Perl, or Tcl
Experience with JasperGold or VC-Formal

Preferred

Experience to quickly understand and interpret specifications and extract design behaviors/properties
Experience in formal property verification of complex compute blocks such as DSP, CPU, GPU or HW accelerators
Experience with complex SoCs
Formal verification experience in clock domain crossing, IP-XACT based register verification and low power
Experience with development of fully automated flows from specification to fully verified designs
Experience with simulators and waveform debugging tools

Benefits

Bonus
Equity
Benefits

Company

Meta's mission is to build the future of human connection and the technology that makes it possible.

Funding

Current Stage
Late Stage

Leadership Team

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Kathryn Glickman
Director, CEO Communications
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Christine Lu
CTO Business Engineering NA
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