Georgia Tech Research Institute · 3 days ago
Trusted Microelectronics Research & Design Engineer - GTRI - CIPHER - Open Rank
The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology. They are seeking a microelectronics expert to research and contribute to the design, synthesis, characterization, packaging, testing, reliability, security, and trustworthiness of nano-fabricated microelectronic semiconductor devices.
AssociationBiotechnologyInformation TechnologyNon Profit
Responsibilities
Utilize industry standard microelectronic design and verification tools (.e.g Vivado, Quartus, Cadence, Modelsim, OneSpin)
Apply knowledge of microelectronic circuitry and its design implementation into microelectronics hardware security techniques -Develop custom software and scripting solutions in support of microelectronic design security and analysis
May Implement software interfacing with microelectronic design EDA/CAD tools -May Implement advanced algorithms covering graph analysis, data analysis, and clustering
Utilize basic microelectronics laboratory equipment (oscilloscopes, signal generators, logic analyzer, optical microscopes, soldering equipment) to support design, analysis, and verification tasks
Develop and maintain familiarity with at least one of the following languages: Verilog, VHDL, Python, C, C++, Rust, Kotlin, or Java (or similar)
Contribute small sections to technical reports and presentations
Research microelectronics system development methodologies that enhance the security and trust of new designs
Develop analysis techniques that evaluate the security and trust of existing designs
Study emerging device architectures, and perform design and verification of complex and high-performance applications
Use novel combinations of commercial, open-source, and custom tools to implement security enhancements to standard FPGA/ASIC design, verification, and hardware testing practices
Develop innovative analysis techniques involving low-level (RTL and gate) design inspection, simulation, formal methods. Use bench testing to identify and characterize security concerns
Design and apply custom PCBs to evaluate various properties of microelectronics devices
Qualification
Required
A strong understanding of embedded systems, hardware design, digital logic design, and various microelectronic architecture
Competency designing hardware leveraging at least one industry-standard HDL language (i.e, Verilog, SystemVerilog, VHDL)
Experience working with at least one major FPGA vendor design tool suite (i.e., Xilinx Vivado, Altera/Intel Quartus, Microsemi Libero) and familiarity with the full design flow (i.e., Simulation, Synthesis, Place-and-Route, Timing Analysis and Closure, Floor Planning)
U.S. Citizenship Requirements: Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens
Clearance Type Required: Candidates must be able to obtain and maintain an active security clearance
Preferred
Active TS/SCI Clearance
Hands-on experience with hardware testing, troubleshooting, and embedded hardware/software integration using general laboratory test equipment such as oscilloscopes and logic analyzers
Design experience with common hardware interfaces (e.g., UART, SPI, I2C), data flow (e.g., FIFOs, clock domain crossing), and bus protocols (e.g., AXI, AMBA)
Experience performing verification of hardware designs leveraging industry-standard tools and methodologies (e.g., ModelSim/Questa, SystemVerilog, UVM)
Experience using Python /Octave/MATLAB/Simulink for modeling digital signal processing blocks
Experience with analog/digital circuit design and PCB design and manufacturing
Experience with embedded C/C++ or Rust programming and a high-level scripting language (e.g. Python, TCL)
Comfortable working in a Linux environment
Benefits
Health & Welfare
Retirement Plans
Tuition Reimbursement
Time Off
Professional Development
Company
Georgia Tech Research Institute
The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research organization of the Georgia Institute of Technology (Georgia Tech).
Funding
Current Stage
Late StageTotal Funding
$6.28MKey Investors
US Department of EnergyUS Department of Commerce, Economic Development AdministationAlfred P. Sloan Foundation
2024-03-13Grant· $2.4M
2024-02-26Grant
2023-10-10Grant· $1.2M
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