Principal Software Engineer - Low Power Verification (R51413/bz) jobs in United States
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Cadence · 1 month ago

Principal Software Engineer - Low Power Verification (R51413/bz)

positionSan Jose, CA
timeFull-time
remoteOnsite
senioritySenior Level, Lead/Staff
money$180K/yr - $195K/yr
date5+ years exp

Cadence is seeking a Principal Software Engineer to help build the next generation of low-power verification software for Palladium and Protium emulation platforms. In this role, you will drive improvements in performance, debuggability, and scalability of multi-billion-gate UPF designs, while collaborating with R&D teams to deploy UPF solutions across key flows.

AerospaceElectronic Design Automation (EDA)HardwareMobileSemiconductorSoftware
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Growth Opportunities
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H1B Sponsor Likelynote
Hiring Manager
Ken Smith
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Responsibilities

Develop and optimize low-power verification software for Palladium and Protium
Improve UPF debuggability within the IXCOM Modular Compiler and Parallel Partition Compiler
Enhance compiled streaming probes and accelerate waveform generation for large-scale designs
Work closely with R&D, PE, and AE teams to deploy UPF solutions across key flows: AVIP + UPF + 2/4-state, UVMA + UPF + 2/4-state, MC + UPF, Dielets + UPF
Help consolidate and unify UPF software across both platforms
Contribute to high-impact initiatives such as: MC + PPC with UPF 4-state, UPF compilation-time optimization, Vision UPF probe integration, SAGE UPF debug with Verisium

Qualification

C++Object-oriented designHigh-performance software developmentPerlPythonTcl/TkIEEE 1801UPF implementationVerilogSystemVerilogVHDLLarge-scale data processingC/C++ libraries

Required

BS in CS or EE with 7+ years of experience, MS with 5+ years, or PhD with 1+ year
Strong skills in C++, object-oriented design, and high-performance software development
Familiarity with C/C++ libraries, STL, and large-scale data processing
Scripting experience in Perl, Tcl/Tk, and/or Python
Knowledge of IEEE 1801, UPF implementation, and RTL languages (Verilog, SystemVerilog, VHDL)

Company

Cadence

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Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems.
dateFounded in 1988
location
San Jose, California, USA
people-size10001+ employees
web-link
https://www.cadence.com

H1B Sponsorship

Cadence has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (306)
2024 (221)
2023 (282)
2022 (330)
2021 (233)
2020 (209)

Funding

Current Stage
Public Company
Total Funding
unknown
1998-02-20IPO

Leadership Team

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Paul Cunningham
Senior Vice President and General Manager
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Tom Beckley
Senior Vice President, Custom IC & PCB Group
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Recent News

Morningstar.com
Cadence Announces Fourth Quarter and Fiscal Year 2025 Financial Results Webcast
2026-01-07
MarketScreener
Cadence Design Systems to integrate CUDA X technology into chip design software - Nvidia CEO at CES
2026-01-06
Business Wire
Cadence Launches Partner Ecosystem to Accelerate Chiplet Time to Market
2026-01-06
Company data provided by crunchbase