AMD ยท 1 day ago
Cache DFT Verification Engineer
Fort Collins, CO
Full-time
Onsite
Mid Level
$139K/yr - $209K/yrAMD is a company that focuses on building innovative products for next-generation computing experiences. The Cache DFT Verification Engineer will utilize technical expertise to assist in the verification of AMD's next-generation CPU microprocessors, focusing on maintaining and enhancing verification test benches and collaborating with cross-functional teams.
AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor
Hiring Manager
Marc Rodriguez
Responsibilities
Perform Functional and Design for Test feature verification of high-speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL and gate design levels across SoC, Core and block hierarchies
Develop environments, infrastructure, and test plans to accommodate both full chip and stand-alone block-level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor
Participate in development of formal verification techniques
Develop an automated regression infrastructure setup for functional verification of highspeed microprocessor designs
Collaborate with a dedicated team of engineers to define and verify DFT microarchitecture for AMD CPUs
Work with product test teams during test bring up phase of the product
Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design leveraging C/C++/Perl/assembly programming, logic design and simulation skill set
Resolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models
Measure and analyze coverage terms, address exposed weaknesses to meet design/project quality objectives
Develop infrastructure for pattern generation used in post silicon device validation and characterization
When presented with post-silicon issues, replicate design responses using presilicon infrastructure and provide debug expertise to ensure complete validation and characterization success
Coordinate with cross-functional teams to meet project deliverables and manage dependencies with cross-discipline/site RTL, DFT and Implementation design teams along with product manufacturing teams
Qualification
Required
Good written and communication skills
Ability to work in a collaborative team environment
Demonstrate ownership and initiative
Ability to influence technical outcomes
Excellent time management skills
Perform Functional and Design for Test feature verification of high-speed Microprocessor designs
Development of infrastructure, directed and random test suites at behavioral RTL and gate design levels across SoC, Core and block hierarchies
Develop environments, infrastructure, and test plans for full chip and stand-alone block-level verification and debug capabilities
Participate in development of formal verification techniques
Develop an automated regression infrastructure setup for functional verification of high-speed microprocessor designs
Collaborate with a dedicated team of engineers to define and verify DFT microarchitecture for AMD CPUs
Work with product test teams during test bring up phase of the product
Develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design
Resolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models
Measure and analyze coverage terms, address exposed weaknesses to meet design/project quality objectives
Develop infrastructure for pattern generation used in post silicon device validation and characterization
Replicate design responses using presilicon infrastructure and provide debug expertise for validation and characterization success
Coordinate with cross-functional teams to meet project deliverables and manage dependencies with cross-discipline/site RTL, DFT and Implementation design teams along with product manufacturing teams
Preferred
Prior experience with verification techniques of microprocessors/ASIC designs
Demonstrated expertise with Verilog HDL
Proven programming proficiency in x86 assembly, C/C++ and Perl, and Ruby languages along with strong logic simulation competence
Demonstrated solid understanding of modern computer architecture including thorough DFT feature knowledge with JTAG -1149.x, Memory, Logic and I/O Built-In-Self-Test(BIST) and Scan design(LSSD/MuxD) structures and protocol
Familiarity with CMOS transistor design and deep sub-micron logic and memory fault models, including fault simulation techniques
Strong understanding of DFT concepts in areas of MBIST (Memory Built In Self Test) and other related DFT techniques for memory arrays
Prior knowledge of formal verification tools and techniques a plus
Benefits
AMD benefits at a glance.
Company
AMD
Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.
Founded in 1969
10001+ employees
H1B Sponsorship
AMD has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (836)
2024 (770)
2023 (551)
2022 (739)
2021 (519)
2020 (547)
Funding
Current Stage
Public CompanyTotal Funding
unknownKey Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity
Leadership Team
Lisa Su
Chair & CEO
Mark Papermaster
CTO and EVP
Recent News
2026-01-14
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Morningstar.com
2026-01-11
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