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Raytheon · 1 week ago

Principal FPGA Design Engineer - Onsite Tucson, AZ

Tucson, AZ

Full-time

Onsite

Lead/Staff

$101K/yr - $203K/yr

8+ years exp

Raytheon is a leading defense contractor focused on helping the nation and allies defend freedoms. The Principal FPGA Design Engineer will develop FPGA designs for various applications, ensuring high-quality production releases and managing projects while collaborating with circuit card designers and systems engineers.

Intellectual PropertyInternetWeb Hosting

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Deliver production-quality FPGA releases from initial proof of concept to production

Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)

Translate system-level requirements into FPGA requirements

Design and code in VHDL for reliability and maintainability

Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage

Drive projects and execute program schedules on time and budget

Create complete documentation including requirements, verification plans, and user’s guides

Manage moderately sized projects or processes

Viewed as subject-matter expert within discipline

Able to operate with minimal oversight from manager

Coaches, reviews, and delegates work to junior engineers

Support internal and external technical reviews

Support customer interactions and relations

Make improvements to processes, systems or products to enhance overall performance

Qualification

FPGA designVHDL codingXilinx devicesFPGA integrationSystemVerilog codingEmbedded systems designTechnical leadershipDocumentation skillsCollaboration

Required

Bachelor's Degree in Electrical Engineering, Computer Engineering or Electrical Engineering Technology

A minimum of eight (8) years of experience to include the following: FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)

Xilinx or Microsemi devices and flow tools

Delivering FPGA/ASIC solutions to system level applications

Hands on experience with integration and debug of FPGA/ASIC devices

The ability to obtain and maintain a US security clearance prior to the start date. U.S. citizenship is required as only U.S. citizen are eligible for a security clearance

Ability to obtain Interim Secret U.S. government issued security clearance is required prior to start date