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Raytheon · 10 hours ago

HWIL Sr Systems Integrator - FPGA Emphasis - P3

Tucson, AZ

Full-time

Onsite

Mid, Senior Level

$82K/yr - $164K/yr

5+ years exp

Raytheon is a leader in defense and aerospace, dedicated to helping the nation and allies defend freedoms. They are seeking a Hardware in the Loop (HWIL) Senior Systems Integrator with FPGA experience to develop and integrate FPGA solutions across multiple programs, ensuring effective hardware/software interfacing and systems integration tasks.

Intellectual PropertyInternetWeb Hosting

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Develop FPGA solutions across multiple HWIL projects

Coordinate and Collaborate within a common department FPGA team and team Lead (including other SME’s) to best achieve the needs of our support projects

Help other FPGA developers on the team, particularly those who are new to development

Produce FPGA level requirements that meet system level requirements

Track execution and report status to program stakeholders

Report on status of metrics to stakeholders

Development and sustainment activities such as:

+ Code reviews and pull requests using git

+ Developing constraints, and rudimentary experience with device timing closure

+ Create self-testing and reporting simulations

+ Adherence to configuration and code management tools such as git

+ Development of common code and scripting to decrease development time on future efforts

+ Integrate with software, hardware and system engineers on a multidisciplined team

Qualification

FPGA developmentFPGA timing closureVHDLVerilogGitVivadoUARTI2CSPITroubleshooting skillsCommunication skillsOrganization skillsTeam collaboration

Required

Typically requires a Bachelor's Degree in Science, Technology, Engineering or Mathematics (STEM) and 5 years prior relevant experience

Experience examining FPGA vendor documentation and circuit board schematics to find information related to FPGA development, FPGA tool use, and integration

Experience with FPGA timing closure, coding best practices, and build tool flow

Active and transferrable US government issued Secret security clearance (not interim) is required prior to start date. US citizenship is required, as only US citizens are eligible for security clearance

Preferred

Strong communication skills

Experience in FPGA development, including requirements, implementation, including solving low level and systemic issues

Implementation of basic interfaces such as UART, I2C, and/or SPI

Vivado Block Designer or another FPGA vendor equivalent

Vivado, or another FPGA vendor equivalent

FPGA testing and system integration

Self-checking simulations

Git

Experience using VHDL or Verilog

Strong organization, coordination, planning and teaming skills

Experience with Gigabit Transceivers

Experience with electrical standards such as LVDS, RS-422, CMOS, and knowledge of when to use them, and how to troubleshoot

Knowledge of or experience with equipment rack assembly, cable assembly/installation, electronics maintenance, data acquisition systems, oscilloscopes, bus analyzers, logic analyzers, network analyzers, and/or spectrum analyzers

Experience troubleshooting systems using test equipment such as data acquisition systems, oscilloscopes, bus analyzers, logic analyzers, network analyzers, and/or spectrum analyzers

Experience with gate reviews

Existing SSBI clearance

Strong understanding of VHDL