Qualcomm · 8 hours ago
AI/ML Design Verification Methodology Lead Engineer
Santa Clara, CA
Full-time
Onsite
Senior Level, Lead/Staff
$176K/yr - $264K/yr
5+ years expQualcomm Atheros, Inc. is seeking an AI/ML Design Verification Methodology Lead Engineer to develop and implement verification strategies for various Qualcomm WIFI, connectivity, and IoT device architectures. The successful candidate will lead a team of verification engineers and collaborate closely with design, architecture, and software teams to ensure functionality and performance.
Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
Responsibilities
This role involve defining and driving AI/ML verification methodology, developing and enhancing constrained-random verification environments using SystemVerilog and UVM
Leading and mentoring a team of verification engineers, and collaborating cross-functionally with other teams
Explore innovative DV methodologies (formal, simulation, and emulation strategies) to continuously push the quality and efficiency of test benches by adopting emerging techniques and tools
Act as a technical point of contact to the different IP and SoC design teams
Provide technical leadership through personal example, mentorship, and strong teamwork
Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products
Creates highly advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements
Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs
Evaluates all aspects of highly complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow
Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC Packages
Writes detailed technical documentation for highly complex EDA/IP/ASIC projects; reviews technical documentation for junior engineers
Qualification
Required
Over 5 years of ASIC/SoC verification experience, with at least 2 years in a leadership role
Experience with various aspects of digital verification such as test automation, code and functional coverage, constraint randomization, system Verilog assertions, and performance
Candidate should have proven experience in verifying complex AI/ML hardware or high-performance compute cores
Proficiency in System Verilog / UVM based verification skills, experience with assertions, and coverage-based verification methodology
Experience with C/C++, assembly language
Knowledge of low power design concepts and power management is a big plus
Strong communication and leadership skills are also required
Experience with AMBA bus protocols
Experience with GLS, and scripting languages such as Perl, Python is a plus
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience
OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience
OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
Preferred
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
9+ years of ASIC design, verification, validation, integration, or related work experience
3+ years of experience with architecture and design tools
3+ years of experience with scripting tools and programming languages
3+ years of experience with design verification methods
2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above)
Benefits
Competitive annual discretionary bonus program
Annual RSU grants
Highly competitive benefits package
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
10001+ employees
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
Leadership Team
Cristiano Amon
President and Chief Executive Officer
I
Isaac Eteminan
CEO
Recent News
2025-12-31
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2025-12-30
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