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Northrop Grumman · 1 day ago

Principal Digital Verification Engineer / Senior Principal Digital Verification Engineer - R10209925

Linthicum Heights, MD

Full-time

Onsite

Senior Level, Lead/Staff

$116K/yr - $174K/yr

5+ years exp

Northrop Grumman is a leading technology company involved in revolutionary systems that impact lives globally. They are seeking a Principal Digital Verification Engineer/Senior Principal Digital Verification Engineer to support ASIC and FPGA product development, focusing on functional verification and collaboration with cross-discipline engineering teams.

AerospaceData IntegrationManufacturingRemote SensingSecurity

Growth Opportunities

No H1B

Security Clearance Required

U.S. Citizen Only

Hiring Manager

Lisa Aase, CDR

Responsibilities

Work closely with design and verification engineers and will utilize your knowledge of modern verification methods, tools and techniques

Perform functional verification of register transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl

Development of testbench, tests, verification IP (VIP), verification models, coverage models, extensive simulation and debug, code coverage and functional coverage, generation and analysis of reports and metrics, documentation etc

Ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals

Qualification

FPGA verificationASIC verificationUVMSystemVerilogRTL debugTestplan developmentObject-oriented programmingScripting languagesDigital signal processingTeam collaboration

Required

Bachelor's degree with 5 years of experience, a Master's degree with 3 years of experience or a PhD with 0 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree

U.S Citizenship is required

The ability to obtain/maintain an Active DoD secret clearance and Special Program Access (SAP)

3 years of experience with FPGA or ASIC verification using UVM

Experience developing testplans, participating in reviews, test development and RTL debug

Bachelor's degree with 8 years of experience, a Master's degree with 6 years of experience or a PhD with 3 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree

U.S Citizenship is required

The ability to obtain/maintain an Active DoD secret clearance and Special Program Access (SAP)

3 years of experience with FPGA or ASIC verification using UVM

Experience developing testplans, participating in reviews, test development and RTL debug