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Sierra Nevada Corporation · 4 weeks ago

Field Programable Gate Array Firmware Engineer III - Hardware Design

Folsom, CA

Full-time

Onsite

Mid, Senior Level

$108K/yr - $149K/yr

6+ years exp

Sierra Nevada Corporation is a global leader in aerospace and national security, dedicated to advancing technology and innovation. They are seeking a talented Firmware Design Engineer to design, develop, document, integrate, test, and debug FPGA and SoC architectures for Department of Defense systems.

AerospaceCyber SecurityHardwareNavigationProduct DesignSecuritySoftware

No H1B

Security Clearance Required

U.S. Citizen Only

Responsibilities

Implement advanced firmware designs (FPGA, SoCs, SOMs)

Test and verification of FPGA/SoC firmware designs through simulations and during hardware/software integration

Create detailed firmware design documentation and prepare for and conduct internal and external design reviews

Initiate problem-solving for new and existing product designs, addressing and resolving difficult design issues on challenging projects

Quick prototype solutions for complex and risky design elements

Understand, plan, and execute technical activities in accordance with SNC policies, procedures, and specific customer requirements, while ensuring engineering design and development activities meet customer quality, cost, and schedule requirements

Develop specifications, control documents, verification and validation plans, procedures, reports, and other documentation to support design and development activities

Maintains logs and manuals to document integration and testing

Responsible for tracking firmware tasks within the Integrated Master Schedule and provide regular updates to the Project Engineer

Responsible for the design and development of units from concept through qualification testing

Qualification

FPGA designVHDL developmentSoC architecturePCB designC/C++ understandingPython scriptingCommunicationTeam collaborationProblem-solving

Required

Bachelor's of Science degree in Electrical Engineering or other related discipline and typically 6 or more years of relevant experience

Higher education may substitute for relevant experience

Demonstrated knowledge of engineering principles and practices

Understanding of Computer Aided Engineering tools

Experience working in multi-disciplinary design & development teams

Basic understanding of digital circuit concepts

Experience with FPGA HDL development, simulation and analysis, utilizing the VHDL language

Average to Advanced experience with Microsoft Office Applications (Word, Excel, Powerpoint and Visio)

FPGA Design Experience using VHDL, with proficiency in Xilinx FPGAs/SoCs (Ultrascale+) and development tools (Vivado, Vitis). Experience with Altera, MicroSemi, or Cypress FPGAs is also desired. Skilled in state machine design and high-speed digital bus design, including PCIe, Ethernet, USB, SPI, uSD, I2C, and serial interfaces

Proficient with static timing analysis for FPGA/SoC designs

Proficient with scripting (Python, Tcl)

Understanding of C/C++

Hands-on experience in the lab with hardware bring-up and unit testing of FPGA/SoC design using standard test equipment

Experience with integration/debug tools such as digital multi-meters, power supplies, oscilloscopes, logic analyzers, protocol analyzers for serial/USB/I2C/Ethernet, impedance analyzers, and FPGA debug tools (ChipScope)

Knowledge of interface and design documentation such as Functional block diagrams, Hardware Design Specifications, Hardware Design Descriptions, test procedures, and built-in-test methodologies

Proven ability to work effectively in a multi-functional, interdisciplinary team environment including collaborating with software and hardware engineers in firmware development, working with systems engineers for requirement definition, specification, and verification, and partnering with project management to meet design cost and schedule objectives

Excellent verbal and written communication skills

The ability to obtain and maintain a Secret U.S. Security Clearance is required