Altera · 4 hours ago
Senior Principal Engineer, Design Verification
San Jose, CA
Full-time
Onsite
Senior Level, Lead/Staff
$222K/yr - $326K/yr
20+ years expAltera is a leading FPGA company focused on accelerating programmable compute in various domains including AI and networking. They are seeking a Senior Principal Engineer, Design Verification to lead the verification of advanced silicon solutions, ensuring first-pass success through comprehensive test planning and technical leadership.
Enterprise SoftwareManufacturingSemiconductorSoftware
Responsibilities
Lead verification of complex IPs and subsystems, including PCIe Gen5/Gen6 controllers, host interfaces, high-performance DMA engines, datapath accelerators, and fabric interconnects
Architect and implement UVM-based scalable verification environments for next-generation data center hardware
Define and execute comprehensive test plans, ensuring functional coverage and verification closure
Collaborate with design and post-silicon engineering teams to debug and resolve issues across pre-silicon and post-silicon environments
Drive methodology and infrastructure improvements to accelerate coverage closure and reduce verification cycle times by 50% or more
Provide technical leadership and mentorship to junior engineers, and coordinate across global verification teams
Partner with architects to review specifications and contribute to innovative debug features and system performance enhancements
Deliver high-quality, first-pass silicon for data center, HPC, and networking products
Serve as a strategic technical leader influencing verification strategy across multiple programs
Champion best practices in methodology, automation, and infrastructure, driving adoption across engineering teams
Act as a thought leader in PCIe and high-performance SoC verification, representing the company at technical forums, conferences, and standards committees when required
Drive cross-functional alignment across architecture, design, and validation to accelerate product delivery
Mentor, coach, and inspire the next generation of verification leaders, building a pipeline of technical expertise across the organization
Qualification
Required
Bachelor's degree in Computer Engineering, Electrical Engineering, or related field
20+ years of experience in ASIC/SoC design verification
Expertise in PCIe (Gen1-6) protocols, host interfaces, and complex SoC subsystems
Strong proficiency in SystemVerilog, Verilog, UVM, OOP, and testbench development
Proven track record of delivering production-quality silicon in advanced networking and HPC applications
Hands-on experience in debugging pre-silicon and post-silicon issues
Strong leadership experience, with the ability to guide teams of engineers across multiple sites
Preferred
Master's degree in Electrical/Computer Engineering or related field
Experience with DPUs, SmartNICs, and high-performance computing (HPC) architectures
Familiarity with encryption engines, checksum/CRC units, ARM interconnects, and fabric switches
Demonstrated success in driving cross-functional alignment under aggressive schedules
Holder of multiple U.S. patents in I/O, debug, or system performance (or equivalent technical innovations)
Benefits
Incentive opportunities that reward employees based on individual and company performance
Company
Altera
Altera provides programmable logic devices and design software for various applications. It is a sub-organization of Intel.
1001-5000 employees
H1B Sponsorship
Altera has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (67)
Funding
Current Stage
Public CompanyTotal Funding
unknown2025-04-14Acquired
1988-03-31IPO
Leadership Team
Raghib Hussain
Chief Executive Officer
Recent News
Business Wire
2025-11-25
2025-11-19
Company data provided by crunchbase