PHIZENIX · 2 months ago
Digital Design Verification Engineer
Santa Clara, CA
Full-time
Onsite
Mid Level
3+ years expPhizenix is a company focused on advancing technology in communication systems, and they are seeking a Digital Design Verification Engineer. The role involves building and maintaining a state-of-the-art verification environment, developing comprehensive test plans, and collaborating with design teams on system-level verification.
Information Technology & Services
Responsibilities
Build and maintain a state-of-the-art verification environment to test RTL against reference analog/mixed-signal models
Develop comprehensive verification test plans, create tests, execute regressions, track coverage, and report program progress
Collaborate with design and communication systems teams on system-level verification using UVM, SystemC, and DPI-C testbenches
Create and manage an automated regression environment to streamline builds and ensure database integrity
Qualification
Required
Bachelor's degree in electrical/communications engineering or computer science
3–5+ years of hands-on verification experience, preferably in communication systems
Demonstrated success in taking products to high-volume production, ideally achieving first-pass silicon
Strong proficiency in SystemVerilog, UVM, C, and SystemC, along with solid scripting expertise
Excellent problem-solving, debugging, and communication skills (both written and verbal)
Preferred
Bachelor's or Master's degree in Electrical/Communications Engineering
Experience with verification techniques leveraging analog/mixed-signal reference models
Knowledge of coverage-driven verification methodologies and test plan development
Familiarity with constrained-random and assertion-based verification techniques
Ability to quickly learn and apply new verification methodologies and tools
Company
PHIZENIX
We provide Talent Solutions for the AI Era.
2-10 employees
Funding
Current Stage
Early StageCompany data provided by crunchbase