Design Verification Engineer, Staff jobs in United States
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d-Matrix · 2 months ago

Design Verification Engineer, Staff

positionSanta Clara, CA
timeFull-time
remoteHybrid
senioritySenior Level, Lead/Staff
money$161K/yr - $260K/yr
date5+ years exp

d-Matrix is focused on unleashing the potential of generative AI to power the transformation of technology. They are seeking a Design Verification Engineer, Staff who will work on innovative in-memory computing architecture and contribute to a collaborative and inclusive culture. The role involves leading verification efforts and ensuring the success of SoC designs.

AI InfrastructureArtificial Intelligence (AI)Cloud InfrastructureData CenterSemiconductor
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H1B Sponsor Likelynote

Responsibilities

We want to build a company and a culture that sustains the tests of time
We offer the candidate a very unique opportunity to express themselves and become a future leader in an industry that will have a huge influence globally
We are striving to build a culture of transparency, inclusiveness and intellectual honesty while ensuring all our team members are always learning and having fun on the journey
The candidate will get to work on a path breaking architecture with a highly experienced team that knows what it takes to build a successful business

Qualification

SoC verification cycleUVM/OVM verification methodologiesSystemVerilog randomizationASIC-SoC Design verificationC/C++ programmingPassion for AILeadership in verificationProblem-solving skills

Required

BS in Electrical Engineering, Computer Science or related field with 7 + years of Industry experience or MS Electrical Engineering, Computer Science or related field preferred with 5 + years industry experience
Experience in SoC verification cycle from architecture to tape out to bring up
Good knowledge of verification methodologies such as UVM/OVM etc
Hands on ASIC-SoC Design verification tests and debug experience
Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology
Good problem-solving skills, and the passion to take on challenges (particularly in AI domain)
Good experience with SystemVerilog, and verification methodology (UVM/OVM/VMM)
Passionate about AI and thriving in a fast-paced and dynamic startup culture

Preferred

Experience with C/C++, SystemC (a big plus!)
Successfully lead creation/implementation of multiple SoC verification environments and tape out efforts

Company

d-Matrix

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D-Matrix is a platform that enables data centers to handle large-scale generative AI inference with high throughput and low latency.
dateFounded in 2019
location
Santa Clara, California, USA
people-size51-200 employees
web-link
https://www.d-matrix.ai

H1B Sponsorship

d-Matrix has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (20)
2024 (15)
2023 (8)
2022 (7)

Funding

Current Stage
Growth Stage
Total Funding
$429M
Key Investors
Temasek HoldingsTSVC
2025-11-12Series C· $275M
2023-09-06Series B· $110M
2022-04-20Series A· $44M

Leadership Team

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Peter Buckingham
Senior Vice President, Software Engineering
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