Sr. Specialist, Electrical Engineer (ASIC / FPGA Design) Engineer) jobs in United States
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L3Harris Technologies · 1 week ago

Sr. Specialist, Electrical Engineer (ASIC / FPGA Design) Engineer)

L3Harris Technologies is a global aerospace and defense technology innovator dedicated to delivering end-to-end solutions for mission-critical needs. The Senior Design Engineer will be responsible for leading the design and delivery of FPGA/ASICs for high-speed crypto applications, ensuring robust quality and performance for national security products.

CommercialInformation TechnologyNational Security
badNo H1BnoteSecurity Clearance RequirednoteU.S. Citizen Onlynote
Hiring Manager
Ingrid Kirchmaier
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Responsibilities

Derive engineering specifications from system requirements and develop detailed architecture
Plan and execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)
Generate test plans
Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards
Silicon/FPGA bring up, characterization and production ramp/support/collateral

Qualification

ASIC/FPGA designVHDL designEthernet protocolsTCP/IP protocolsC++ (OOP)High level synthesisUniversal Verification MethodologyAnalytical skillsWritten communicationVerbal communicationPresentation skillsProject leadership

Required

Bachelor's degree in Electrical Engineering or equivalent degree, and minimum 6 years of prior relevant experience (or Master's degree plus 4 years of prior relevant experience) developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products
Possess active SECRET Clearance
Proficiency in mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs
Proficient in VHDL design process and FPGA flow
Knowledge of Ethernet, TCP/IP protocols
Strong logic/board debug, and analytical skills
Excellent written, verbal, and presentation skills

Preferred

Prior experience in Aerospace / Defense
Experience in C++ (OOP)
Experience in Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS
Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto)
Experience with Universal Verification Mythology (UVM)
Experience with project leadership and EVM

Benefits

Health and disability insurance
401(k) match
Flexible spending accounts
EAP
Education assistance
Parental leave
Paid time off
Company-paid holidays

Company

L3Harris Technologies

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L3Harris Technologies provides platform management system solutions for armed forces.

Funding

Current Stage
Public Company
Total Funding
$2.25B
2024-03-27Post Ipo Debt· $2.25B
1978-01-13IPO

Leadership Team

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Tania Hanna
Vice President, Government Relations
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Chip Teets
Senior Director, International Programs, Products & Technology
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Company data provided by crunchbase