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Samsung Semiconductor · 1 week ago

Senior Staff Engineer, Serdes Layout Design

San Jose, California, United States

Full-time

Onsite

Senior Level, Lead/Staff

$181K/yr - $289K/yr

10+ years exp

Samsung Semiconductor Inc. (SSI) is advancing the world’s technology as a leader in Memory, System, LSI and LCD technologies. The role involves working as a senior high speed mixed-signal layout engineer, focusing on layout tasks for various high-speed circuits and collaborating with circuit designers to optimize performance.

Semiconductor

H1B Sponsor Likely

Responsibilities

Working with circuit designers located in San Jose, California, USA to accomplish layout tasks

Work on High Speed RX (receiver), TX (transmitters), PLL, CDR, Analog reference circuits, and so on

Optimize the performance and power consumption of SERDES analog PHY

Work with remote circuit designers to determine the chip floorplan

Come up with strategies to optimize the parasites, reduce area, and improve High Speed SERDES/analog performance

Estimate schedule and come up with plan how to get things done within a dedicated time frame

Read the design document provided by the foundry and figure out how to resolve issues like latch-up and DRC

Perform custom layout using Virtuoso, and be able to get LVS/DRC clean

Familiar with CAD tools, including Virtuoso, Calibre LVS, DRC, SkillCad and so on

Desired to have experience on chip level design, like bump, pad, and ESD strategies

Good communication skills to discuss with circuit designer

Qualification

High Speed SERDES layoutDeep submicron CMOSCADENCE layout toolsCalibre DRCLVSProgramming in SKILLPerlPythonCuriosityResilienceCreativeCommunication skillsProject leadershipCollaborationInnovative

Required

Bachelors with 15+ years, Masters with 13+ years or PhDs with 10+ years of experience

Experience in RF/analog/mixed-signal/serdes layout design of deep submicron CMOS circuits and recent experience on advance nodes including FinFET and GAA technologies

High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports

Familiar with analog/mixed-signal related circuit layout, including high-speed I/O block such as comparator/transmitter/receiver/PLLs and so on

Experience with CADENCE or MENTOR GRAPHICS layout tools

Good communication skills with design leads as well as engineers for schedule planning

Experience of leading a complicated layout project, and tape-out successfully

You're inclusive, adapting your style to the situation and diverse global norms of our people

An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding

You're collaborative, building relationships, humbly offering support and openly welcoming approaches

Innovative and creative, you proactively explore new ideas and adapt quickly to change

Preferred

Programming knowledge in SKILL, Perl, and/or Python is a bonus

Benefits

Medical/Dental/Vision/401k

Charitable giving match

4+ weeks of paid time off a year

Stipend for fertility care or adoption

Medical travel support

Virtual vet care for your fur babies

On-demand apps and free confidential therapy sessions

Onsite Café and gym

Virtual classes

Company

Samsung Semiconductor

Samsung Semiconductor, Inc. (SSI) is a multi-billion dollar wide range of industry-leading semiconductor solutions.

Founded in 1974

San Jose, California, USA

10001+ employees

https://www.samsung.com/us/samsungsemiconductor

H1B Sponsorship

Samsung Semiconductor has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (130)

2024 (110)

2023 (153)

2022 (134)

2021 (124)

2020 (134)