Cirrus Logic · 2 months ago
Senior Design Verification Engineer (GK)
Cirrus Logic has been a leader in mixed-signal processing for over four decades, known for its innovative solutions and award-winning culture. The Senior Design Verification Engineer will join the silicon design verification team, working closely with various engineers to ensure the successful verification of mixed-signal IC developments.
Enterprise SoftwareReal TimeSoftwareSpeech Recognition
Responsibilities
Perform verification planning
Testbench development using UVM methodologies
Implement functional verification of mixed-signal ASICs
Failure analysis and resolution, coverage analysis and population
Digital/mixed-signal modeling
Develop directed/constraint-random test generation, gate-simulations
Regression debug support and other flow/infrastructure development
Qualification
Required
MS or PhD in Electrical Engineering or Computer Engineering
Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM, OVM, AVM, Vera)
Preferred
Able to work closely with digital/analog designers, applications engineers, and manufacturing test to support both pre-silicon verification and post-silicon validation efforts
Knowledge of signal processing and Verilog Assertions
Ability to create, evaluate, debug, and improve verification processes
Ability to mentor junior engineers in verification methodology
Company
Cirrus Logic
Cirrus Logic is an industry leader in low-power audio and high-performance mixed-signal processing technology that creates immersive user experiences for the world’s top mobile and consumer applications.
Funding
Current Stage
Late StageTotal Funding
$5.8M2017-04-01Acquired
2016-02-11Debt Financing· $0.23M
2015-03-24Series Unknown· $0.58M
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