AMD · 2 months ago
Senior Manager High Speed Analog Design
San Jose, California
Full-time
Onsite
Senior Level, Lead/Staff, Director/Executive
$172K/yr - $294K/yrAdvanced Micro Devices, Inc (AMD) is a leading company dedicated to building innovative products that enhance computing experiences across various domains. They are seeking a Senior Manager of High Speed Analog Design to lead a team of analog/mixed signal silicon designers, ensuring successful project delivery and innovation in high-speed IO technologies.
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Responsibilities
Lead and manage a team of analog/mixed signal silicon designers for High Speed IO/SerDes/DDR designs (Mixed Signal IPs = MSIP)
Responsibilities high level planning, work breakdown planning, tasks assignments and progress tracking, schedule and priority management, performance review, mentor, talent development, and hiring
Work with project-manager, system architects, SOC designers and physical designers to guarantee quality/timely deliverables meeting schedule and technical requirements
Contribute to the definition of microarchitecture and circuit architecture for various MSIP & AMS blocks
Drive various domains (e.g. Analog Design, Custom Digital Design, AMS Circuit Architecture and AMS Design Verification, Layout) across different geographies and time zones, to ensure successful cross-team engagement and high-quality execution
Ensure quality of work within schedule and mitigate overall risk
Proven Track record of successfully taking high speed IO MSIP designs to production
Contribute to the definition of flows that improve efficiency and quality of execution
Manage circuit verification flows to confirm design meets performance, power, reliability and timing requirements
Work closely with the mask design organization to deliver the physical design as well as define production/bench-level test plans with post-silicon characterization groups for silicon evaluation to ensure interlocked and high-quality execution
Influence development of AMS design workflows and methodology for best in-class/best PPA circuits designs
Support Post-Silicon teams’ activities in validation and characterization of IP (Performance, Power, Functionality, ..)
Qualification
Required
Experience leading others in technical and managerial settings
Excellent communication, writing, and presentation skills
Lead and manage a team of analog/mixed signal silicon designers for High Speed IO/SerDes/DDR designs (Mixed Signal IPs = MSIP)
Responsibilities high level planning, work breakdown planning, tasks assignments and progress tracking, schedule and priority management, performance review, mentor, talent development, and hiring
Work with project-manager, system architects, SOC designers and physical designers to guarantee quality/timely deliverables meeting schedule and technical requirements
Contribute to the definition of microarchitecture and circuit architecture for various MSIP & AMS blocks
Drive various domains (e.g. Analog Design, Custom Digital Design, AMS Circuit Architecture and AMS Design Verification, Layout) across different geographies and time zones, to ensure successful cross-team engagement and high-quality execution
Ensure quality of work within schedule and mitigate overall risk
Proven Track record of successfully taking high speed IO MSIP designs to production
Contribute to the definition of flows that improve efficiency and quality of execution
Manage circuit verification flows to confirm design meets performance, power, reliability and timing requirements
Work closely with the mask design organization to deliver the physical design as well as define production/bench-level test plans with post-silicon characterization groups for silicon evaluation to ensure interlocked and high-quality execution
Influence development of AMS design workflows and methodology for best in-class/best PPA circuits designs
Support Post-Silicon teams' activities in validation and characterization of IP (Performance, Power, Functionality, ..)
Preferred
Analog/Mixed signal design lead with professional experience in the semiconductor industry with focus on analog/mixed signal silicon IP design and development
Experience successfully leading small to medium size analog/mixed signal design engineering teams
Able to lead a team effectively, with good interpersonal skills, enthusiasm and positive energy
Analytical thinking, inventive, and Quality-oriented mindset
Strong and effective technical and management communication at the peer and upward management levels
Hand-on design experience in high-speed serial and/or parallel (memory, die-to-die interfaces) PHY/IO designs
Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking (PCIE, USB,…,LPDDR, HBM, gDDR, …, UCIE, …)
Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5/3nm nodes with a solid understanding of transistor device performance and fundamentals
A track record of successful design and productization of analog/mixed signal silicon IPs
Direct hands-on experience in the following PHY/IO-AFE/PLL/Clocking circuits architecture and design
In-depth knowledge of analog, digital, and semi-digital circuit architecture
Experience in high-speed custom digital and low power design techniques is highly desirable
Knowledge of AMS EDA industry-standard tools and best-in-class design practices/methodologies for analog/mixed signal design
Proficient in AMS design flows, tools, and methodologies
Familiar with Cadence schematic capture/virtuoso, Spectre/HSPICE/other circuit simulation tools
Excellent written and verbal communication skills able to operate without direct supervision but also work cross-functionally, cross-geographies collaborating and being part of a multi-disciplinary team in a dynamic environment
Strong initiative and ownership
Seek help proactively as well as share and pass on knowledge
Company
AMD
Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.
Founded in 1969
10001+ employees
H1B Sponsorship
AMD has a track record of offering H1B sponsorships. Please note that this does not
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reference. (Data Powered by US Department of Labor)
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2025 (836)
2024 (770)
2023 (551)
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2020 (547)
Funding
Current Stage
Public CompanyTotal Funding
unknownKey Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity
Leadership Team
Lisa Su
Chair & CEO
Mark Papermaster
CTO and EVP
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