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Advanced Microdevices Pvt. Ltd. (India) · 2 months ago

Lead Formal Verification Engineer

Austin, TX

Full-time

Hybrid

Lead/Staff

Advanced Micro Devices, Inc is dedicated to building great products that enhance next-generation computing experiences. They are seeking a Lead Formal Verification Engineer to drive formal verification techniques for graphics IP design, working closely with architecture and design teams to define the verification roadmap and methodology.

BiopharmaBiotechnologyIndustrialManufacturing

Responsibilities

Define long-term strategy for formal verification expansion and steer the technical roadmap

Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc

Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge

Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design

Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD

Qualification

Formal verification techniquesSystem Verilog assertionFormal verification toolsComputer architecture knowledgeGraphics pipeline knowledgeLeadership skillsEffective communicationCollaboration skills

Required

Proven experience in driving cutting-edge formal verification methodology to achieve industry leading verification quality and productivity under tight schedule

Demonstrated rich experience in formal verification techniques for complicated modern processors (CPU, GPU, AI processor, etc.)

Possess leadership skills to influence and drive the whole formal verification team in GFXIP

Able to communicate effectively and work optimally with different teams across the organization

Define long-term strategy for formal verification expansion and steer the technical roadmap

Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic

Scale formal verification to big and critical design for bug-free quality

Expand formal verification adoption to the whole IP development life cycle

Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc

Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity

Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge

Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc

Explore the feasibility of formalizing ISA and memory model for GFXIP design

Stay informed of latest trends and innovations in formal verification

Develop technical relationship with broader AMD Design community and peers

Drive cross-department innovation and collaboration inside AMD

Undergrad degree required

Preferred

In-depth knowledge in formal verification algorithms, engines and use cases

Proven expertise in system Verilog assertion and abstract model development

Expert user of formal verification tool from both academy and EDA vendors (JasperGold, VC formal, Murphi, theorem prover)

Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor

Comprehensive knowledge of computer architecture and graphics pipeline

Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred

Master or PhD degree in Computer Science/ Computer Engineering/ Electrical Engineering preferred