Staff Engineer, ASIC Design Methodology jobs in United States
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Tenstorrent · 2 months ago

Staff Engineer, ASIC Design Methodology

positionBoston, Massachusetts, United States
timeFull-time
remoteOnsite
seniorityLead/Staff
money$100K/yr - $500K/yr

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. They are looking for an ASIC Design Methodology Engineer to advance their design infrastructure and flows across RTL development, verification, and physical implementation.

AI InfrastructureApplication Specific Integrated Circuit (ASIC)Artificial Intelligence (AI)ElectronicsMachine LearningSemiconductor
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Comp. & BenefitsbadNo H1BnoteU.S. Citizen Onlynote

Responsibilities

Develop and maintain ASIC design methodologies and infrastructure for RTL development and integration
Own and evolve static code analysis (Lint, CDC, RDC, DFT) and RTL-netlist logic equivalency design methodologies
Develop synthesis timing constraints (SDC) and low power design specifications (UPF)
Support RTL-to-GDS flow enablement, ensuring clean handoffs and sign-off readiness
Collaborate with EDA vendors and internal tool owners to optimize performance, quality, and runtime

Qualification

ASIC design flowsRTL designStatic code analysisSynthesis timing constraintsLow power design specificationsCollaborationProblem solving

Required

A strong advocate for design quality and productivity, with expertise in ASIC design flows
Skilled in RTL design and familiar with static and dynamic analysis tools
Comfortable automating design checks and improving methodology for scalability and reuse
A collaborative engineer who partners effectively across RTL, verification, and backend teams
Develop and maintain ASIC design methodologies and infrastructure for RTL development and integration
Own and evolve static code analysis (Lint, CDC, RDC, DFT) and RTL-netlist logic equivalency design methodologies
Develop synthesis timing constraints (SDC) and low power design specifications (UPF)
Support RTL-to-GDS flow enablement, ensuring clean handoffs and sign-off readiness
Collaborate with EDA vendors and internal tool owners to optimize performance, quality, and runtime

Benefits

Highly competitive compensation package
Benefits

Company

Tenstorrent

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Tenstorrent develops AI hardware and software solutions for data processing and machine learning application.
dateFounded in 2016
location
Toronto, Ontario, CAN
people-size501-1000 employees
web-link
http://tenstorrent.com

Funding

Current Stage
Late Stage
Total Funding
$1.03B
Key Investors
FidelityEPIQ Capital GroupEclipse Ventures
2024-12-02Series D· $693M
2023-08-02Series Unknown· $100M
2021-05-20Series C· $200M

Leadership Team

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Jim Keller
CEO
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Keith Witek
Chief Operating Officer
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Recent News

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CES 2026: Razer goes all-in on AI with Project Ava and Snapdragon-powered wearables
2026-01-07
TechRadar.com
Razer joins AI bandwagon with external AI accelerator backed by iconic AMD chip architect
2026-01-07
IndiaTimes
Polymage Labs ties up with US-based Tenstorrent to develop AI compiler
2026-01-06
Company data provided by crunchbase