Advanced Microdevices Pvt. Ltd. (India) · 2 months ago
Lead Design Verification Engineer
Santa Clara, CA
Full-time
Onsite
Senior Level, Lead/StaffAdvanced Micro Devices, Inc is a company focused on building products that enhance next-generation computing experiences. They are seeking a Lead Design Verification Engineer to drive the verification strategy and execution for high-performance networking chips, while leading teams and collaborating across various disciplines.
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Responsibilities
Ownership of verification strategy for one or more major IP blocks or subsystems within a complex networking ASIC
Architect and implement testbenches using UVM/SystemVerilog, ensuring maximum coverage and quality
Develop and maintain test plans, coverage models, and scoreboards to ensure comprehensive verification of all design features
Lead and mentor a team of DV engineers — drive reviews, define milestones, and ensure high-quality deliverables
Collaborate closely with design, architecture, and software teams to define verification requirements and debug issues across the full chip
Develop and maintain automation and regression infrastructure, including CI/CD integration
Drive coverage closure and signoff for IP and SoC-level verification
Contribute to methodology improvements, verification IP reuse, and best practices across the DV organization
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
Qualification
Required
Expertise in verifying networking chip
Meticulous about Power, Performance and Area while driving schedule and managing cost
Deep expertise in SoC/ASIC verification
Strong knowledge of networking protocols and architectures
Proven ability to lead verification teams in a fast-paced environment
Ownership of verification strategy for one or more major IP blocks or subsystems within a complex networking ASIC
Architect and implement testbenches using UVM/SystemVerilog, ensuring maximum coverage and quality
Develop and maintain test plans, coverage models, and scoreboards to ensure comprehensive verification of all design features
Lead and mentor a team of DV engineers — drive reviews, define milestones, and ensure high-quality deliverables
Collaborate closely with design, architecture, and software teams to define verification requirements and debug issues across the full chip
Develop and maintain automation and regression infrastructure, including CI/CD integration
Drive coverage closure and signoff for IP and SoC-level verification
Contribute to methodology improvements, verification IP reuse, and best practices across the DV organization
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
Preferred
Proven line management experience, including hiring, mentoring, and performance management of DV engineers
Demonstrated ability to build and lead high-performing verification teams, setting goals and driving execution across projects
Experience with chip-level verification for networking ASICs, switches, or routers
Familiarity with traffic generators, packet-level verification, and network protocol stacks
Knowledge of SystemC, C testbenches, or hardware/software co-verification
Exposure to emulation or FPGA prototyping environments (e.g., Palladium, Veloce)
Prior experience leading cross-site or multi-IP verification efforts
Strong communication, collaboration, and leadership skills with the ability to influence technical direction across disciplines
Bachelor's or Master's degree in related discipline preferred
Benefits
AMD benefits at a glance.
Company
Advanced Microdevices Pvt. Ltd. (India)
Advanced Microdevices (mdi) is a leader in innovative membrane technologies.
Founded in 1976
501-1000 employees
Funding
Current Stage
Late StageLeadership Team
Nalini Kant Gupta
Founder & Managing Director
Recent News
2024-10-18
2024-10-16
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