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Marvell Technology · 2 weeks ago

Principal Engineer, Hardware Systems & Silicon Validation

Irvine, CA

Full-time

Onsite

Senior Level, Lead/Staff

$145K/yr - $214K/yr

5+ years exp

Marvell Technology is a leading provider of semiconductor solutions that form the backbone of data infrastructure. The Principal Engineer will be responsible for validating high-performance networking hardware, specifically focusing on Ethernet PHY products, and ensuring they meet rigorous performance and reliability standards.

DSPInternet of ThingsManufacturingSemiconductorWireless

Growth Opportunities

No H1B

U.S. Citizen Only

Responsibilities

Own responsibility for Marvell Ethernet Cu PHY Validation in post-silicon environment

Develop System-level and Silicon-level test plan for Marvell Alaska-M Ethernet PHY and Alaska-C HSC Retimer PHY products

Define, document, execute and report the overall PHY validation/test plan for Marvell storage devices

Lab-based silicon bring-up and unit test execution focused on 10BASE-T Physical and PCS layer hardware and firmware functionality

Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER

Analyze and debug issues on PHY protocol of storage interface (SERDES, Ethernet)

Troubleshoot failing tests using diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers

Lead collaborative technical discussions to drive resolution on technical issues

Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to Cu PHY and High Speed SERDES Retimer PHY

Work closely with customers to address design issue and debug failure cases

Qualification

High-speed SERDESEthernet Networking protocolsHigh Speed IO testingPAM4 SERDES characterizationAnalog AFE characterizationSystem testingDebugTest equipment proficiencyAnalytical skillsHardware board designPythonCommunication skillsProblem-solving skills

Required

Bachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience

Strong understanding of high-speed SERDES, equalization technique and Ethernet Networking protocols

5+ years of experience with High Speed IO testing, Analog AFE characterization debugging and validation

Strong lab skills with hands on experience, in system bring up, system testing and debug

In-depth working knowledge of test equipment used for PAM4 SERDES characterization and 10GBASE-T Cu PHY Ethernet AFE Analog ADC, DAC characterization (Scope, BERT, Network analyzer, Spectrum Analyser etc.)

Strong analytical, problem-solving and communication skills