Broadcom · 7 hours ago
Design Engineer - Chip Floorplanner
Fort Collins, CO
Full-time
Onsite
Senior Level, Lead/Staff
$127K/yr - $203K/yr
10+ years expBroadcom is a leading technology company specializing in custom CMOS ASICs for various cutting-edge products. The Design Engineer - Chip Floorplanner will focus on chip-level physical architecture and integration for advanced ASICs, working on high-performance SoC designs and collaborating with various teams to optimize the overall die layout.
MobileSemiconductorWireless
Responsibilities
Define and optimize top-level floorplan architecture, including die size estimation, hierarchy definition, and partitioning
Drive macro placement, power grid design, clock distribution planning, pin placement, and feedthrough optimization
Collaborate closely with RTL, timing, and packaging teams to balance performance, power, and area (PPA) targets
Lead top-level timing closure, congestion analysis, and ECO implementation to ensure clean tapeout readiness
Coordinate with block owners and integration teams for smooth block-level to top-level convergence
Support cross-functional design integration, providing guidance and technical support to internal and external partners
Apply a deep understanding of block PnR, timing closure, physical verification, and IR/EM analysis to achieve signoff-quality results
Contribute to design flow automation and methodology development for advanced process technologies
Qualification
Required
Strong foundation in VLSI design principles and ASIC physical design fundamentals
In-depth experience with floorplanning, die partitioning, and hierarchical design
Working knowledge of PLLs, clock networks, power delivery, and timing-critical structures
Familiarity with physical verification, DRC/LVS, and congestion/power analysis
Proven ability to drive PPA optimization through innovative layout and planning strategies
Strong experience with TCL scripting and Linux environments is required
BS in Electrical or Computer Engineering with 12+ years of relevant experience, or MS in Electrical or Computer Engineering with 10+ years of relevant experience
Preferred
Proficiency in Python, Perl, or Ruby is preferred
Experience with Cadence or equivalent physical design tools is highly desirable
Benefits
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave and vacation time
The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Company
Broadcom
Broadcom is a designer, developer, and global supplier of a broad range of analog and digital semiconductor connectivity solutions.
10001+ employees
H1B Sponsorship
Broadcom has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (92)
2024 (77)
2023 (79)
2022 (112)
2021 (110)
2020 (89)
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-10-31Post Ipo Equity
2015-05-28Acquired
1998-04-17IPO
Leadership Team
Greg Singh
CTO for APJ, Enterprise Security Group
Kirsten Spears
CFO and CAO, Broadcom
Recent News
The Motley Fool
2026-01-13
2026-01-11
Company data provided by crunchbase