General Dynamics · 2 months ago
Sr ASIC FPGA Verification Engineer
USA-AZ-Scottsdale
Full-time
Hybrid
Mid, Senior Level
2+ years expGeneral Dynamics Mission Systems is a leading provider of high technology solutions and services for defense and scientific applications. They are seeking a Senior ASIC FPGA Verification Engineer responsible for the design, verification, and documentation of ASIC and FPGA developments, ensuring compliance with functional criteria through rigorous testing and simulation.
AerospaceNational SecurityPublic Transportation
No H1B
Security Clearance RequiredU.S. Citizen Only
Responsibilities
Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
Determines architecture, system simulation and detailed design approach
Defines module interfaces and all aspects of device design and simulation
Creates test and simulation plans that establish functional criteria
Verifies test results and analyzes performance
May also review vendor capabilities and simulation tools
Participates in the improvement of the ASIC/FPGA organizational processes
Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
May provide leadership and/or direction to lower level employees
Independently determines approach to solutions
Contributes to the completion of major programs and projects
Plans and executes project tasks for activities described above
Qualification
Required
Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field
2+ years of job-related experience or a Master's degree
Department of Defense TS/SCI security clearance is preferred at time of hire
U.S. citizenship is required
Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
Proficient in the principles and techniques of ASIC/FPGA design and the design process
Proficient in Microsoft Office applications
Proficient written and verbal communications skills
Ability to think creatively
Ability to multi-task
Proficient skill in communicating issues, impacts, and corrective actions
Works under limited direction
Preferred
In-depth experience using RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim tools or equivalent in a Linux Environment
In-depth knowledge of System Verilog object oriented programming and the Universal Verification Methodology (UVM)
Understands UVM Testbench Architectures
Comfortable using and developing UVM agents, bus functional models
Understands different types of coverage, usage of cover classes, cover points, etc
Experience with predictive testbench components, functional coverage and assertions
Experience with constrained random testing
Experience with the Register Abstraction Layer
Familiarity with requirements-based verification, requirement tracing, and developing requirement verification strategies etc
Experience with scripting languages such as Linux shell scripts, TCL, Python
Familiarity with using Formal Verification tools, code coverage, writing waivers etc
Familiarity with Questa Verification IP (QVIP)
Developing UVM testbenches for designs implemented in Xilinx devices with Xilinx IP and SoCs
AXI protocols, PCIe, Space Wire, and Ethernet interfaces
DSP functions and common signal processing components
Familiar with debugging FPGA/ASIC hardware and assisting with HW/SW integration
Continuous Integration features of GITLab
Clear understanding of embedded micro-processing systems, FPGA Design and Verification using VHDL, and digital circuit analysis and design
Collaborative, creative thinker with high proficiency in technical problem solving
Team player with effective communication and presentation skills
Experience designing high speed interfaces and complex memory designs
Commitment to ongoing professional development for yourself and others
Benefits
401k matching
Flex time off
Paid parental leave
Healthcare benefits
Health & wellness programs
Employee resource and social groups
And more
Company
General Dynamics
General Dynamics is a defense industry contractor for shipbuilding, marine, combat and defense systems and, munitions.
10001+ employees
Funding
Current Stage
Public CompanyTotal Funding
$84.9M2010-09-10Grant· $30M
2009-12-30Grant· $33.6M
2009-08-05Grant· $21.3M
Leadership Team
Lauren Bradshaw, SHRM-CP
Global Mobility Business Partner/ EAP
Matthew Brandon, MSHR
Manager, Sr HR Business Partner
Recent News
Business Insider
2026-01-09
2026-01-09
2026-01-09
Company data provided by crunchbase