Apply on Employer Site

SpaceX · 2 months ago

Sr. SOC/ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering)

Sunnyvale, CA

Full-time

Onsite

Senior Level

$170K/yr - $230K/yr

5+ years exp

SpaceX is a pioneering aerospace manufacturer and space transportation company focused on enabling human life on Mars. The Sr. SOC/ASIC Physical Design Methodology/CAD Engineer will develop next-generation silicon for both space and ground infrastructures, working closely with cross-disciplinary teams to enhance the performance of the Starlink network.

Advanced MaterialsAerospaceManufacturingNational SecuritySpace Travel

Growth Opportunities

No H1B

U.S. Citizen Only

Responsibilities

Create and support innovative RTL2GDSII methodology and CAD flows, capable of handling multimillion gate designs for best-in-class PPA and run times

Create integrated hierarchical physical design flow to enable SoC collateral management for PV/STA/EM/IR signoff

Create dashboard/central reports for project tracking and visualizing results/stats

Interface directly with RTL, physical design, package design, DFT and other teams to improve methodologies and efficiencies and drive efforts to resolution

Work with EDA tool vendors to evaluate new tools, solve bugs, improve usability, methodology and design flow

Integrate foundry EDA kits into SpaceX environment, drive vendor IP integration into SpaceX infrastructure

Drive setting up RTL2GDSII flows for brand new technology nodes, run regressions, quality assurance checks, and release high quality flows to execution designers before starting the project

Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)

Qualification

Physical DesignRTL2GDSII flowsEDA toolsPythonLow-power designHigh-performance designDynamic environment adaptabilityTeam-playerCommunication

Required

Bachelor's degree in electrical engineering, computer engineering or computer science

5+ years of experience in the field of Physical Design and/or CAD for RTL2GDSII flows

Preferred

Experience in high-performance, low-power physical design, and implementation techniques with industry standard synthesis, place and route, or signoff tools

Knowledge of cutting-edge technology node across foundries

Excellent programming skills in languages like Python, Perl, TCL, Shell, etc

Good understanding of algorithms with emphasis on optimizing algorithms

Knowledge of creating dashboards and html status reporting systems for various EDA tool outputs (synthesis, place and route, signoff, DFT, etc.)

Experience with machine learning

Excellent verbal and written communications

Ability to work in a dynamic environment with changing needs and requirements

Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis

Enjoys being challenged and learning new skills