Technical Staff Engineer - Architecture (System Interconnect) jobs in United States
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Microchip ยท 3 months ago

Technical Staff Engineer - Architecture (System Interconnect)

position3750 N First St, San Jose, CA 95134, USA
timeFull-time
remoteOnsite
senioritySenior Level, Lead/Staff
money$88K/yr - $232K/yr
date12+ years exp

Microchip Technology is a global leader in the semiconductor industry, and they are seeking a highly skilled System Interconnect Architect to join their FPGA Business group. The role involves leading cross-functional teams to deliver high-performance IP integrations into FPGA products while collaborating with various engineering disciplines.

ElectronicsManufacturingSemiconductor
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Work & Life Balance
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H1B Sponsor Likelynote

Responsibilities

Lead cross-functional teams to deliver high-performance IP integrations into Microchip FPGA products
Work on ASIC & FPGA IP development, integration, and deployment for System Interconnect such as PCIe, CXL, DDR, NOC, High Speed Serial Transceivers, High Performance Parallel IO interfaces
Understand customer use models and the role of IP in overall system architecture
Work cross-functionally with other architects, designers, and back-end implementation teams
Lead and manage other engineers in the team

Qualification

ASIC & FPGA IP developmentSystem Interconnect architectureTechnical leadershipScripting for EDASynopsys & Cadence ASIC flowsSystem-level performance modelingPeople managementCross-functional collaboration

Required

MS or higher in EE, CS, CE or other applicable disciplines
12+ years of relevant experience
Proven experience in ASIC & FPGA IP development, integration, and deployment, including all stages of development from Synthesis, constraint management, place & route, floor planning, timing closure, CDC/RDC
Proven ability to work cross-functionally with other architects, designers, and back-end implementation teams
Knowledge and experience with Synopsys & Cadence ASIC flows

Preferred

Knowledge and experience with system-level performance modeling in TLM/SystemC/Other will be an advantage
Experience in technical leadership and people management will be an advantage
Scripting for EDA in Perl, Python, Tcl will be an advantage

Benefits

Competitive base pay
Restricted stock units
Quarterly bonus payments
Health benefits that begin day one
Retirement savings plans
Industry leading ESPP program with a 2 year look back feature

Company

Microchip

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dateFounded in 1976
location
Sunnyvale, California, USA
people-size10001+ employees
web-link
http://supertex.com

H1B Sponsorship

Microchip has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (170)
2024 (113)
2023 (116)
2022 (119)
2021 (94)
2020 (100)

Funding

Current Stage
Late Stage
Total Funding
unknown
2014-02-10Acquired
Company data provided by crunchbase