Physical Design Implementation Lead - ML/AI focused jobs in United States
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Altera · 2 weeks ago

Physical Design Implementation Lead - ML/AI focused

positionSan Jose, CA
timeFull-time
remoteOnsite
senioritySenior Level, Lead/Staff
money$143K/yr - $206K/yr
date10+ years exp

Altera is a leader in programmable solutions that enhance innovation across industries. The Physical Design Implementation Lead will own and drive full-chip implementation processes, collaborating with various teams to ensure seamless integration and optimize design efficiency.

Enterprise SoftwareManufacturingSemiconductorSoftware
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H1B Sponsor Likelynote

Responsibilities

Own and drive full-chip implementation from RTL to GDSII, including timing closure, power optimization, and physical verification
Collaborate with RTL, DFT, STA, and packaging teams to ensure seamless integration and convergence across domains
Develop and maintain automation scripts (Tcl, Python, Perl, etc.) to enhance productivity and flow robustness
Evaluate and integrate EDA tools and methodologies to improve design efficiency and QoR
Lead technical reviews and provide guidance to design teams on best practices and flow usage
Analyze design metrics and debug complex issues across the physical design flow
Drive innovation in physical design methodologies to meet aggressive PPA and schedule targets

Qualification

Physical design implementationEDA tools expertiseScripting skillsFull-chip implementationTiming analysisPower optimizationHierarchical design methodologiesMachine learning techniquesFPGA architecture knowledgeProblem-solving skillsCommunication skillsLeadership skills

Required

BS/MS or PhD in Electrical Engineering, Computer Engineering, or related field
10+ years of hands-on experience in physical design implementation and flow development
Expert-level knowledge of industry-standard EDA tools (Synopsys, Cadence, Siemens)
Strong scripting skills in Tcl, Python, Perl, and shell
Proven experience in full-chip implementation and tapeout of complex SoCs or FPGAs
Deep understanding of timing, power, signal integrity, and physical verification
Excellent problem-solving, communication, and leadership skills

Preferred

Experience with hierarchical design methodologies and physical IP integration
Familiarity with advanced process nodes
Knowledge of machine learning techniques applied to EDA flows is a plus
Prior experience in FPGA architecture or design is highly desirable

Company

Altera

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Altera provides programmable logic devices and design software for various applications. It is a sub-organization of Intel.
dateFounded in 1983
location
San Jose, California, USA
people-size1001-5000 employees
web-link
https://www.altera.com

H1B Sponsorship

Altera has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (67)

Funding

Current Stage
Public Company
Total Funding
unknown
2025-04-14Acquired
1988-03-31IPO

Leadership Team

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Raghib Hussain
Chief Executive Officer
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Recent News

Business Wire
Altera’s Agilex™ 5 FPGAs and SoCs Wins 2025 AspenCore World Electronics Achievement Award
2025-11-25
Morningstar.com
Altera Expands Its Strategic Partnership with AXISCADES for Mission-Critical Defense Applications Development
2025-11-19
MarketScreener
Axiscades Technologies and Altera expands strategic partnership
2025-11-19
Company data provided by crunchbase